BTC
Usage: BTC dest,src Modifies flags: CF
The 'dest' bit indexed by the 'src' value is copied into the Carry Flag after being complimented (inverted).
Bit Test
BT r/m16,reg16 ; o16 0F A3 /r [386]
BT r/m32,reg32 ; o32 0F A3 /r [386]
BT r/m16,imm8 ; o16 0F BA /4 ib [386]
BT r/m32,imm8 ; o32 0F BA /4 ib [386]
BTC r/m16,reg16 ; o16 0F BB /r [386]
BTC r/m32,reg32 ; o32 0F BB /r [386]
BTC r/m16,imm8 ; o16 0F BA /7 ib [386]
BTC r/m32,imm8 ; o32 0F BA /7 ib [386]
BTR r/m16,reg16 ; o16 0F B3 /r [386]
BTR r/m32,reg32 ; o32 0F B3 /r [386]
BTR r/m16,imm8 ; o16 0F BA /6 ib [386]
BTR r/m32,imm8 ; o32 0F BA /6 ib [386]
BTS r/m16,reg16 ; o16 0F AB /r [386]
BTS r/m32,reg32 ; o32 0F AB /r [386]
BTS r/m16,imm ; o16 0F BA /5 ib [386]
BTS r/m32,imm ; o32 0F BA /5 ib [386]
These instructions all test one bit of their first operand, whose index is given by the second operand, and store the value of that bit into the carry flag. Bit indices are from 0 (least significant) to 15 or 31 (most significant).
In addition to storing the original value of the bit into the carry flag, BTR also resets (clears) the bit in the operand itself. BTS sets the bit, and BTC complements the bit. BT does not modify its operands.
The destination can be a register or a memory location. The source can be a register or an immediate value.
If the destination operand is a register, the bit offset should be in the range 0-15 (for 16-bit operands) or 0-31 (for 32-bit operands). An immediate value outside these ranges will be taken modulo 16/32 by the processor.
If the destination operand is a memory location, then an immediate bit offset follows the same rules as for a register. If the bit offset is in a register, then it can be anything within the signed range of the register used (ie, for a 32-bit operand, it can be (-2^31) to (2^31 - 1)
EXAMPLE:
mov eax 00_1111_0000
mov ebx 7
btc eax ebx ; eax = 70h Note: change to carry flag
Assembly is real open source .
bt
Usage: BT dest,src Modifies flags: CF
The 'dest' bit indexed by the 'src' value is copied into the Carry Flag.
Bit Test
برای رمزگشایی از عبارات زیر به پست ADD مراجعه فرمایید :
BT r/m16,reg16 ; o16 0F A3 /r [386]
BT r/m32,reg32 ; o32 0F A3 /r [386]
BT r/m16,imm8 ; o16 0F BA /4 ib [386]
BT r/m32,imm8 ; o32 0F BA /4 ib [386]
BTC r/m16,reg16 ; o16 0F BB /r [386]
BTC r/m32,reg32 ; o32 0F BB /r [386]
BTC r/m16,imm8 ; o16 0F BA /7 ib [386]
BTC r/m32,imm8 ; o32 0F BA /7 ib [386]
BTR r/m16,reg16 ; o16 0F B3 /r [386]
BTR r/m32,reg32 ; o32 0F B3 /r [386]
BTR r/m16,imm8 ; o16 0F BA /6 ib [386]
BTR r/m32,imm8 ; o32 0F BA /6 ib [386]
BTS r/m16,reg16 ; o16 0F AB /r [386]
BTS r/m32,reg32 ; o32 0F AB /r [386]
BTS r/m16,imm ; o16 0F BA /5 ib [386]
BTS r/m32,imm ; o32 0F BA /5 ib [386]
These instructions all test one bit of their first operand, whose index is given by the second operand, and store the value of that bit into the carry flag. Bit indices are from 0 (least significant) to 15 or 31 (most significant).
In addition to storing the original value of the bit into the carry flag, BTR also resets (clears) the bit in the operand itself. BTS sets the bit, and BTC complements the bit. BT does not modify its operands.
The destination can be a register or a memory location. The source can be a register or an immediate value.
If the destination operand is a register, the bit offset should be in the range 0-15 (for 16-bit operands) or 0-31 (for 32-bit operands). An immediate value outside these ranges will be taken modulo 16/32 by the processor.
If the destination operand is a memory location, then an immediate bit offset follows the same rules as for a register. If the bit offset is in a register, then it can be anything within the signed range of the register used (ie, for a 32-bit operand, it can be (-2^31) to (2^31 - 1)
مثال مربوط به این دستور ، در اسمبلر RosAsm :
EXAMPLE:
main:
mov eax 00_1111_0000 ; eax = 11110000b
mov ebx 7 ; ebx = 7d
bt eax ebx ; Note: change to carry flag
ret ; Return to RosAsm or OS
Assembly is real open source .
bswap
Usage: BSWAP reg32 Modifies flags: none
Changes the byte order of a 32 bit register from big endian to little endian or vice versa. Result left in destination register is undefined if the operand is a 16 bit register.
Byte Swap
BSWAP reg32 ; o32 0F C8+r [486]
BSWAP swaps the order of the four bytes of a 32-bit register: bits 0-7 exchange places with bits 24-31, and bits 8-15 swap with bits 16-23. There is no explicit 16-bit equivalent: to byte-swap AX, BX, CX or DX, XCHG can be used. When BSWAP is used with a 16-bit register, the result is undefined.
EXAMPLE:
main:
mov eax , 01111_0000 ; eax = 11110000b
bswap eax ; eax = 15d
ret
Assembly is real open source .
bsr
Usage: BSR dest,src Modifies flags: ZF
Scans source operand for first bit set. Sets ZF if a bit is found set and loads the destination with an
index to first set bit. Clears ZF if no bits are found set. BSR scans in reverse across bit pattern.
Bit Scan
BSF reg16,r/m16 ; o16 0F BC /r [386]
BSF reg32,r/m32 ; o32 0F BC /r [386]
BSR reg16,r/m16 ; o16 0F BD /r [386]
BSR reg32,r/m32 ; o32 0F BD /r [386]
BSF searches for the least significant set bit in its source (second) operand, and if it finds one, stores the index in its destination (first) operand. If no set bit is found, the contents of the destination operand are undefined. If the source operand is zero, the zero flag is set.
BSR performs the same function, but searches from the top instead, so it finds the most significant set bit.
Bit indices are from 0 (least significant) to 15 or 31 (most significant). The destination operand can only be a register. The source operand can be a register or a memory location.
Example:
main:
xor eax eax
mov eax 0FF
mov ebx 00_0011_1111_1111_1111
bsr eax ebx ; eax = 0Dh > 13d
ret
Assembly is real open source .
bsf
Usage: BSF dest,src Modifies flags: ZF
Scans source operand for first bit set. Sets ZF if a bit is found set and loads the 'dest' with an index to first set bit. Clears ZF if no bits are found set. BSF scans forward across bit pattern
Bit Scan
BSF reg16,r/m16 ; o16 0F BC /r [386]
BSF reg32,r/m32 ; o32 0F BC /r [386]
BSR reg16,r/m16 ; o16 0F BD /r [386]
BSR reg32,r/m32 ; o32 0F BD /r [386]
BSF searches for the least significant set bit in its source (second) operand, and if it finds one, stores the index in its destination (first) operand. If no set bit is found, the contents of the destination operand are undefined. If the source operand is zero, the zero flag is set.
BSR performs the same function, but searches from the top instead, so it finds the most significant set bit.
Bit indices are from 0 (least significant) to 15 or 31 (most significant). The destination operand can only be a register. The source operand can be a register or a memory location.
Example:
xor eax eax
mov eax 0FF
mov ebx 00_1111_1111_1111_1100
bsf eax ebx ; eax = 2
Assembly is real open source .
arpl
Usage: ARPL dest,src (286+ protected mode) Modifies flags: ZF
Compares the RPL bits of 'dest' against 'src'. If the RPL bits of 'dest' are less than 'src', the destination
RPL bits are set equal to the source RPL bits and the Zero Flag is set. Otherwise the Zero Flag is cleared.
Adjust RPL Field of Selector
ARPL r/m16,reg16 ; 63 /r [286,PRIV]
ARPL expects its two word operands to be segment selectors. It adjusts the RPL (Requested Privilege Level - stored in the bottom two bits of the selector) field of the destination (first) operand to ensure that it is no less (i.e. no more privileged than) the RPL field of the source operand. The zero flag is set if and only if a change had to be made.
The RPL field represents the privilege level of the application program.
main:
arpl eax ebx
ret
Assembly is real open source .
andps
Usage: ANDPS dest,src Modifies flags: CF OF PF SF ZF (AF undefined)
Performs a bitwise logical AND of the four packed single-precision floating-point values from the 'src' operand and the 'dest' operand, and stores the result in the 'dest' operand.
Bitwise Logical AND For Single FP
ANDPS xmm1,xmm2/mem128 ; 0F 54 /r [KATMAI,SSE]
ANDPS performs a bitwise logical AND of the four single-precision floating point values in the source and destination operand, and stores the result in the destination register.
dst[0-31] := src[0-31] AND dst[0-31],
dst[32-63] := src[32-63] AND dst[32-63],
dst[64-95] := src[64-95] AND dst[64-95],
dst[96-127] := src[96-127] AND dst[96-127].
The destination is an XMM register. The source operand can be either an XMM register or a 128-bit memory location.
main:
andps xmm1 Label
ret
Assembly is real open source .
andpd
Usage:ANDPD Modifies flags:CF OF PF SF ZF (AF undefined)
Performs a bitwise logical AND of the two packed double-precision floating-point values from the 'src' operand and the 'dest' operand, and stores the result in the 'dest' operand.
Bitwise Logical AND For Single FP
ANDPD xmm1,xmm2/mem128 ; 66 0F 54 /r [WILLAMETTE,SSE2]
ANDPD performs a bitwise logical AND of the two double-precision floating point values in the source and destination operand, and stores the result in the destination register.
dst[0-63] := src[0-63] AND dst[0-63],
dst[64-127] := src[64-127] AND dst[64-127].
The destination is an XMM register. The source operand can be either an XMM register or a 128-bit memory location.
main:
andnpd xmm1 label
ret
Assembly is real open source .
andnps
دستور ANDNPS
Usage: ANDPS dest.src Modifies flags: None
دستور ANDNPS روی هیچکدام از رجیسترهای پرچم تاثیر ندارد .
Inverts the bits of the four packed single-precision floating-point values in the 'dest', performs a bitwise logical AND of the four packed single-precision floating-point values in the 'src' and the temporary inverted result, and stores the result in the 'dest' operand.
دستور ANDNPS معکوس می کند بیتهای چهار مقدار ممیز شناور دقت منفرد بسته ای را در مقصد و اجرا می کند دستور AND منطقی چهار مقدار ممیز شناور دقت منفرد بسته ای را در مبدا و در نتیجه ی معکوس موقت ، و ذخیره می کند نتیجه را در عملوند مقصد .
Bitwise Logical AND NOT of Packed Single-Precision FP Values
ANDNPS xmm1,xmm2/mem128 ; 0F 55 /r [KATMAI,SSE]
ANDNPS inverts the bits of the four single-precision floating-point values in the destination register, and then performs a logical AND between the four single-precision floating-point values in the source operand and the temporary inverted result, storing the result in the destination register.
دستور ANDNPS معکوس می کند بیتهای چهار مقدار ممیز شناور دقت منفرد را در رجیستر مقصد ، و سپس اجرا می کند یک دستور AND بین چهار مقدار ممیز شناور دقت منفرد را در عملوند مبدا و بطور موقت معکوس می کند نتیجه را ، با نگهداری نتیجه در رجیستر مقصد .
dst[0-31] := src[0-31] AND NOT dst[0-31],
dst[32-63] := src[32-63] AND NOT dst[32-63],
dst[64-95] := src[64-95] AND NOT dst[64-95],
dst[96-127] := src[96-127] AND NOT dst[96-127].
The destination is an XMM register. The source operand can be either an XMM register or a 128-bit memory location.
مقصد ، یک رجیستر XMM می باشد . عملوند مبدا می تواند یا یک رجیستر XMM باشد یا یک آدرس حافظه ی 128 بیتی .
SIMD Floating-Point Exceptions
بدون هرگونه استنثنا .
None.
main:
andnps xmm1 label
ret
+
+
وحید محمدی - وبلاگ وحیدمی
Assembly is real open source .
andnpd
دستور ANDNPD
Usage: ANDNPD dest,src Modifies flags: CF OF PF SF ZF (AF undefined)
دستور ANDNPD بجز پرچم AF سایر پرچمها را اصلاح می کند .
Inverts the bits of the two packed double-precision floating-point values in the 'dest', performs a bitwise logical AND of the two packed double-precision floating-point values in the 'src' and the temporary inverted result, and stores the result in the 'dest' operand.
دستور ANDNPD معکوس می کند بیت های مقادیر ممیز شناور دقت مضاعف بسته ای را در مقصد و اجرا می کند دستور AND منطقی دو مقدار ممیز شناور دقت مضاعف بسته ای را در مبدا و نتیجه ی موقت معکوس ، و نگهداری می کند نتیجه را در عملوند مقصد .
Bitwise Logical AND NOT of Packed Double-Precision FP Values
ANDNPD xmm1,xmm2/mem128 ; 66 0F 55 /r [WILLAMETTE,SSE2]
ANDNPD inverts the bits of the two double-precision floating-point values in the destination register, and then performs a logical AND between the two double-precision floating-point values in the source operand and the temporary inverted result, storing the result in the destination register.
دستور ANDNPD معکوس می کند بیت های دو مقدار ممیز شناور دقت مضاعف را در رجیستر مقصد ، و سپس اجرا می کند یک دستور AND منطقی را بین دو مقدار ممیز شناور دقت مضاعف را در عملوند مبدا و نتیجه ی معکوس موقت ، نگه می دارد نتیجه را در رجیستر مقصد .
dst[0-63] := src[0-63] AND NOT dst[0-63],
dst[64-127] := src[64-127] AND NOT dst[64-127].
The destination is an XMM register. The source operand can be either an XMM register or a 128-bit memory location.
مقصد یک رجیستر XMM می باشد . عملوند مبدا می تواند یا یک رجیستر XMM باشد یا یک آدرس حافظه ی 128 بیتی .
SIMD Floating-Point Exceptions
بدون استثنائات ممیز شناور .
None.
Example:
main:
andnpd xmm1 label
ret
+
+
وحید محمدی - وبلاگ وحیدمی