FRNDINT
Usage: FRNDINT Modifies flags: See below.
Rounds the source value in the ST(0) register to the nearest integral value, depending on the current rounding mode (setting of the RC field of the FPU control word), and stores the result in ST(0).
Floating-Point Round to Integer
FRNDINT ; D9 FC [8086,FPU]
FRNDINT rounds the contents of ST0 to an integer, according to the current rounding mode set in the FPU control word, and stores the result back in ST0.
FPU Flags Affected C1 Set to 0 if stack underflow occurred. Set if result was rounded up; cleared otherwise. C0, C2, C3 Undefined.
Example:
frndint
FPTAN
Usage: FPTAN Modifies flags: See below.
Computes the tangent of the 'src' operand in register ST(0), stores the result in ST(0), and pushes a 1.0 onto the FPU register stack. The source operand must be given in radians and must be less than ±2**63 .
Arctangent and Tangent
FPATAN ; D9 F3 [8086,FPU]
FPTAN ; D9 F2 [8086,FPU]
FPATAN computes the arctangent, in radians, of the result of dividing ST1 by ST0, stores the result in ST1, and pops the register stack. It works like the C atan2 function, in that changing the sign of both ST0 and ST1 changes the output value by pi (so it performs true rectangular-to-polar coordinate conversion, with ST1 being the Y coordinate and ST0 being the X coordinate, not merely an arctangent).
FPTAN computes the tangent of the value in ST0 (in radians), and stores the result back into ST0.
The absolute value of ST0 must be less than 2**63.
FPU Flags Affected
C1 Set to 0 if stack underflow occurred; set to 1 if stack overflow occurred.
Set if result was rounded up; cleared otherwise.
C2 Set to 1 if outside range (-2 63 <source operand <+2 63 ); otherwise, set to 0.
C0, C3 Undefined.
The following table shows the unmasked results obtained when computing the partial tangent of various classes of numbers, assuming that underflow does not occur.
FPTAN Results
ST(0) SRC ST(0) DEST
-8 *
-F -F to +F
-0 -0
+0 +0
+F -F to +F
+8 *
NaN NaN
EXAMPLE:
fptan Label
FPREM1
Usage: FPREM Modifies flags: See below.
Computes the IEEE remainder obtained from dividing the value in the ST(0) register (the dividend) by the value in the ST(1) register (the divisor or modulus), and stores the result in ST(0).
Floating-Point Partial Remainder
FPREM ; D9 F8 [8086,FPU]
FPREM1 ; D9 F5 [386,FPU]
These instructions both produce the remainder obtained by dividing ST0 by ST1. This is calculated, notionally, by dividing ST0 by ST1, rounding the result to an integer, multiplying by ST1 again, and computing the value which would need to be added back on to the result to get back to the original value in ST0.
The two instructions differ in the way the notional round-to-integer operation is performed. FPREM does it by rounding towards zero, so that the remainder it returns always has the same sign as the original value in ST0; FPREM1 does it by rounding to the nearest integer, so that the remainder always has at most half the magnitude of ST1.
Both instructions calculate remainders, meaning that they may not manage to provide the final result, but might leave intermediate results in ST0 instead. If this happens, they will set the C2 flag in the FPU status word; therefore, to calculate a remainder, you should repeatedly execute FPREM or FPREM1 until C2 becomes clear.
FPU Flags Affected C0 Set to bit 2 (Q2) of the quotient. C1 Set to 0 if stack underflow occurred; otherwise, set to least significant bit of quotient (Q0). C2 Set to 0 if reduction complete; set to 1 if incomplete. C3 Set to bit 1 (Q1) of the quotient.
Example:
fprem1
FPREM
Usage: FPREM Modifies flags: See below.
Computes the remainder obtained from dividing the value in the ST(0) register (the dividend) by the value in the ST(1) register (the divisor or modulus), and stores the result in ST(0).
Floating-Point Partial Remainder
FPREM ; D9 F8 [8086,FPU]
FPREM1 ; D9 F5 [386,FPU]
These instructions both produce the remainder obtained by dividing ST0 by ST1. This is calculated, notionally, by dividing ST0 by ST1, rounding the result to an integer, multiplying by ST1 again, and computing the value which would need to be added back on to the result to get back to the original value in ST0.
The two instructions differ in the way the notional round-to-integer operation is performed. FPREM does it by rounding towards zero, so that the remainder it returns always has the same sign as the original value in ST0; FPREM1 does it by rounding to the nearest integer, so that the remainder always has at most half the magnitude of ST1.
Both instructions calculate remainders, meaning that they may not manage to provide the final result, but might leave intermediate results in ST0 instead. If this happens, they will set the C2 flag in the FPU status word; therefore, to calculate a remainder, you should repeatedly execute FPREM or FPREM1 until C2 becomes clear.
FPU Flags Affected C0 Set to bit 2 (Q2) of the quotient. C1 Set to 0 if stack underflow occurred; otherwise, set to least significant bit of quotient (Q0). C2 Set to 0 if reduction complete; set to 1 if incomplete. C3 Set to bit 1 (Q1) of the quotient.
Example:
fprem
FPATAN
Usage: FPATAN Modifies flags: See below.
Computes the tangent of the 'src' operand in register ST(0), stores the result in ST(0), and pushes a 1.0 onto the FPU register stack. The source operand must be given in radians and must be less than ±2**63 . Arctangent and Tangent
FPATAN ; D9 F3 [8086,FPU]
FPTAN ; D9 F2 [8086,FPU]
FPATAN computes the arctangent, in radians, of the result of dividing ST1 by ST0, stores the result in ST1, and pops the register stack. It works like the C atan2 function, in that changing the sign of both ST0 and ST1 changes the output value by pi (so it performs true rectangular-to-polar coordinate conversion, with ST1 being the Y coordinate and ST0 being the X coordinate, not merely an arctangent).
FPTAN computes the tangent of the value in ST0 (in radians), and stores the result back into ST0.
The absolute value of ST0 must be less than 2**63.
FPU Flags Affected C1 Set to 0 if stack underflow occurred; set to 1 if stack overflow occurred. Set if result was rounded up; cleared otherwise. C2 Set to 1 if outside range (-2 63 <source operand <+2 63 ); otherwise, set to 0. C0, C3 Undefined.
The following table shows the unmasked results obtained when computing the partial tangent of various classes of numbers, assuming that underflow does not occur.
FPTAN Results
ST(0) SRC ST(0) DEST
-8 *
-F -F to +F
-0 -0
+0 +0
+F -F to +F
+8 *
NaN NaN
EXAMPLE:
fpatan Label
FSTSW
Usage: FSTSW dest Modifies flags: See below
Stores the current value of the x87 FPU status word in the 'dest' location. The 'dest' can be either a two-byte memory location or the AX register. The FSTSW instruction checks for and handles pending unmasked floating - point exceptions before storing the status word; the FNSTSW instruction does not.
Store Floating-Point Status Word
FSTSW mem16 ; 9B DD /7 [8086,FPU]
FSTSW AX ; 9B DF E0 [286,FPU]
FNSTSW mem16 ; DD /7 [8086,FPU]
FNSTSW AX ; DF E0 [286,FPU]
FSTSW stores the FPU status word into AX or into a 2-byte memory area.
FNSTSW does the same thing as FSTSW, without first waiting for pending floating-point exceptions to clear.
FPU Flags Affected The C0, C1, C2, and C3 are undefined.
EXAMPLE:
fstsw Label
FSTENV / FNSTENV
Usage: FSTENV src Modifies flags: None
Saves the current FPU operating environment at the memory location specified with the 'dest' operand, and then masks all floating-point exceptions. The FPU operating environment consists of the FPU control word, status word, tag word, instruction pointer, data pointer, and last opcode.
Store Floating-Point Environment
FSTENV mem ; 9B D9 /6 [8086,FPU]
FNSTENV mem ; D9 /6 [8086,FPU]
FSTENV stores the FPU operating environment (control word, status word, tag word, instruction pointer, data pointer and last opcode) into memory. The memory area is 14 or 28 bytes long, depending on the CPU mode at the time. See also FLDENV.
FNSTENV does the same thing as FSTENV, without first waiting for pending floating-point exceptions to clear.
EXAMPLE:
fstenv Label
fnstenv Label
FSTCW / FNSTCW
Usage: FSTCW src Modifies flags: None
FNSTCW src
Stores the current value of the FPU control word at the specified destination in memory. The FSTCW instruction checks for and handles pending unmasked floating-point exceptions before storing the control word; the FNSTCW instruction does not.
Store Floating-Point Control Word
FSTCW mem16 ; 9B D9 /7 [8086,FPU]
FNSTCW mem16 ; D9 /7 [8086,FPU]
FSTCW stores the FPU control word (governing things like the rounding mode, the precision, and the exception masks) into a 2-byte memory area. See also FLDCW.
FNSTCW does the same thing as FSTCW, without first waiting for pending floating-point exceptions to clear.
EXAMPLE:
fstcw
fnstcw
FSAVE / FNSAVE
Usage: FSAVE dest Modifies flags: See below.
The C0, C1, C2, C3 flags are loaded. Stores the current FPU state (operating environment and register stack) at the specified destination in memory, and then re-initializes the FPU.
Save/Restore Floating-Point State
FSAVE mem ; 9B DD /6 [8086,FPU]
FNSAVE mem ; DD /6 [8086,FPU]
FRSTOR mem ; DD /4 [8086,FPU]
FSAVE saves the entire floating-point unit state, including all the information saved by FSTENV plus the contents of all the registers, to a 94 or 108 byte area of memory (depending on the CPU mode). FRSTOR restores the floating-point state from the same area of memory.
FNSAVE does the same as FSAVE, without first waiting for pending floating-point exceptions to clear.
Under 32 Bits OS, the Structure of the 108 Bytes Memory is as follow:
[FPU_STATE:
ControlWord: W$ ? Padding1: W$ ?
StatusWord: W$ ? Padding2: W$ ?
TagWord: W$ ? Padding3: ?
IPtr: D$ ?
CSeg: W$ ? Padding4: W$ ?
OperandAddress: D$ ?
DSeg: W$ ? Padding5: W$ ?
ST0reg: T$ ? ST1reg: T$ ? ST2reg: T$ ?
ST3reg: T$ ? ST4reg: T$ ? ST5reg: T$ ?
ST6reg: T$ ? ST7reg: T$ ?]
FPU Flags Affected C1 Set to 0 if stack underflow occurred. Set if result was rounded up; cleared otherwise. C0, C2, C3 Undefined.
The FSAVE instruction checks for and handles pending unmasked floating-point exceptions before storing the FPU state; the FNSAVE instruction does not. The FPU operating environment consists of the FPU control word, status word, tag word, instruction pointer, data pointer, and last opcode. The contents of the FPU register stack are stored in the 80 bytes immediately follow the operating environment image. The saved image reflects the state of the FPU after all floating-point instructions preceding the FSAVE/FNSAVE instruction in the instruction stream have been executed.
Example:
fsave Label
FNOP
Usage: FNOP Modifies flags: None
Performs no FPU operation. Takes up space in the instruction stream but does not affect the FPU or machine context, except the EIP register.
Floating-Point No Operation
FNOP ; D9 D0 [8086,FPU]
FNOP does nothing.
EXAMPLE:
fnop