وو

وحید آنلاین . آرشیو وبلاگ وحیدمی دات آی آر . شرکت بیان. vahidmy.blog.ir

وو

وحید آنلاین . آرشیو وبلاگ وحیدمی دات آی آر . شرکت بیان. vahidmy.blog.ir

Addressing


Addressing   ..



Addressing is the act of specifying a memory location (Address) for reading from or for writing to.



Immediate  Addressing


This is simply writing a given value into a Register or in Memory. Examples:


mov  edi ,  040301C


Under modern OSes, this way for Addressing is not used, as the actual Addresses of a  running Application (RVA) are not supposed to be known by the programmer. The Assemblers (and Linkers) do this job by computing the symbolic names  encountered in the Sources.  Example: the upper statement could be found in a disassembly; but, in the Source code, it could be:


mov  edi  MySymbol




Register Addressing


Is loading a Register with an Address value previously stored in another Register:


mov eax  ebx




Indirect Addressing


Is reading/writing from/to a Memory cell:


[Value: 124,  642,  0,  33]


mov ecx , D$Value




Register Indirect Addressing


Is reading/writing from/to Memory through a Register.


On the 80386+ you may specify any general purpose 32 bit register when using the register indirect addressing mode. D$eax, D$ebx, D$ecx, D$edx, D$esi, and D$edi all provide addresses. The D$esp always refers to the Stack and  D$ebp is usually reserved, too, for Stack pointing.


Note that you must use the 32 bit names of the registers. You cannot use the 16 bit names because the Addressing Memory space is the one of the 32 Bits Mode. The following examples show the legal forms Set:


mov eax D$eax

mov eax D$ebx

mov eax D$ecx

mov eax D$edx

mov eax D$esi

mov eax D$edi

mov eax D$ebp

mov eax D$esp


; Example with our upper Data: [Value: 124,  642,  0,  33]


mov esi Value

    mov ecx  D$esi          ; ecx = 124




Indexed Register Indirect Addressing


Is reading/writing from/to Memory  through a Register plus an Offset:


mov esi   Value

mov ecx  D$esi+4    ; ecx = 642




Base Indexed Addressing


Same as above, but instead of an immediate Offset, we stand one more Register:


; Example with our upper Data: [Value: 124,  642,  0,  33]


mov eax  4

mov ebx  Value

mov ecx  D$ebx+eax ; ecx = 642



All examples can be given with a Memory as first member and register as second one (this is to say, to write to Memory, instead of reading from Memory).



SIB Addressing (Effective address)


For addressing a Memory content, the x86  offers an organization of the target, described as Scaled Indexed addressing modes. This is to say the combination of a Base, an Index and a Displacement. 


[disp + index*n]

[base + index*n]

[disp + base + index*n]


Base and Index are any of the X86 32 bit general purpose registers and n  is the value 1, 2, 4 or 8.


When running the Instruction, the X86 computes the effective address by adding disp, base, and index*n together. Examples:


mov eax D$ebx+esi*4+8

mov eax D$Value+ebx+ebx*2

mov eax D$Value+esi*8



The full syntax (maximum instruction possibilities) for Memory addressing is:


Address = Base + (Index * Scale) + Displacement:


mov eax   D$Value+eax*4+ebx


Where ''eax*4'' is allowed by the so called SIB (Scale / Index / Base ) encoding, very  useful for addressing a table of Words (*2), of dWords (*4), of qWords (*8). (You just increase EAX to point to the next record).


The 'Scale' is: 2, 4, 8

The 'Index' is, here, eax

The 'Base' is, here, ebx

(Value is called 'Displacement').


As RosAsm syntax allows you to add an immediate to the given Displacement (here, Value), you could even write, for example:


mov eax  D$Value+32+eax*4+ebx


Take special notice that this single Instruction performs, all at once, the multiplication of eax by 4, and two Additions (the third addition of Value+32 is done by the Assembler, at Compile time).



Base Index Scale Displacement

 EAX EAX 1    None    

 EBX EBX                

 ECX ECX 2    8-Bits  

 EDX + EDX    *        +            

 ESP       3   16-Bits  

 EBP EBP                

 ESI ESI 4   32-Bits  

 EDI EDI                


Table of the Effective Address Computation.



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