COMISS
Usage: COMISD src1,src2 Modifies flags:See below.
Compares the low-order single-precision FP value in the two source operands. ZF, PF and CF are set according to the result. OF, AF and AF are cleared. The unordered result is returned if either source is a NaN (QNaN or SNaN).
Scalar Ordered Single-Precision FP Compare and Set EFLAGS
COMISS xmm1,xmm2/mem32 ; 66 0F 2F /r [KATMAI,SSE]
COMISS compares the single-precision floating-point values in the low doublewords of 'src' (first operand) and 'src' 2 (second operand), and sets the ZF, PF, and CF flags in the EFLAGS register according to the result (unordered, greater than, less than, or equal). The OF, SF, and AF flags in the EFLAGS register are set to 0. The unordered result is returned if either source operand is a NaN (QNaN or SNaN).
The source1 operand is an XMM register. The source2 operand can be either an XMM register or a memory location.
The flags are set according to the following rules:
Result Flags Values
UNORDERED: ZF,PF,CF <-- 111;
GREATER_THAN: ZF,PF,CF <-- 000;
LESS_THAN: ZF,PF,CF <-- 001;
EQUAL: ZF,PF,CF <-- 100;
The COMISS instruction differs from the UCOMISS instruction in that it signals an SIMD floating-point invalid operation exception (#I) when a source operand is either a QNaN or SNaN.
The UCOMISS instruction signals an invalid numeric exception only if a source operand is an SNaN. The EFLAGS register is not updated if an unmasked SIMD floating-point exception is generated.
Example:
comiss xmm1 xmm2