MFENCE
Usage: MFENCE Modifies flags: None
Performs a serializing operation on all load-from-memory and store-to-memory instructions that were issued prior the MFENCE instruction.
Memory Fence
MFENCE ; 0F AE /6 [WILLAMETTE,SSE2]
MFENCE performs a serializing operation on all loads from memory and writes to memory that were issued before the MFENCE instruction. This guarantees that all memory reads and writes before the MFENCE instruction are completed before any reads and writes after the MFENCE instruction.
MFENCE is ordered respective to other MFENCE instructions, LFENCE, SFENCE, any memory read and any other serialising instruction (such as CPUID).
Weakly ordered memory types can be used to achieve higher processor performance through such techniques as out-of-order issue, speculative reads, write-combining, and write-collapsing. The degree to which a consumer of data recognizes or knows that the data is weakly ordered varies among applications and may be unknown to the producer of this data. The MFENCE instruction provides a performance-efficient way of ensuring load and store ordering between routines that produce weakly-ordered results and routines that consume that data.
MFENCE uses the following ModRM encoding:
Mod (7:6) = 11B
Reg/Opcode (5:3) = 110B
R/M (2:0) = 000B
All other ModRM encodings are defined to be reserved, and use of these encodings risks incompatibility with future processors.
See also LFENCE and SFENCE.
EXAMPLE:
mfence