PFNACC
Usage: PFNACC dest,src Modifies flags: None
Performs negative accumulation of the two doublewords of the 'dest' operand and the 'src' operand. Then stores the results in the low and high words of the 'dest' operand.
Packed Single-Precision FP Negative Accumulate
PFNACC mm1,mm2/m64 ; 0F 0F /r 8A [PENT,3DNOW]
PFNACC performs a negative accumulate of the two single-precision FP values in the source and destination registers. The result of the accumulate from the destination register is stored in the low doubleword of the destination, and the result of the source accumulate is stored in the high doubleword of the destination register.
The operation is:
dst[0-31] := dst[0-31] - dst[32-63],
dst[32-63] := src[0-31] - src[32-63].
Both operands are single-precision, floating-point operands with 24-bit significands.
Example:
pfnacc mm1 Label
PFNACC
Usage: PFNACC dest,src Modifies flags: None
Performs negative accumulation of the two doublewords of the 'dest' operand and the 'src' operand. Then stores the results in the low and high words of the 'dest' operand.
Packed Single-Precision FP Negative Accumulate
PFNACC mm1,mm2/m64 ; 0F 0F /r 8A [PENT,3DNOW]
PFNACC performs a negative accumulate of the two single-precision FP values in the source and destination registers. The result of the accumulate from the destination register is stored in the low doubleword of the destination, and the result of the source accumulate is stored in the high doubleword of the destination register.
The operation is:
dst[0-31] := dst[0-31] - dst[32-63],
dst[32-63] := src[0-31] - src[32-63].
Both operands are single-precision, floating-point operands with 24-bit significands.
Example:
pfnacc mm1 Label
PFNACC
Usage: PFNACC dest,src Modifies flags: None
Performs negative accumulation of the two doublewords of the 'dest' operand and the 'src' operand. Then stores the results in the low and high words of the 'dest' operand.
Packed Single-Precision FP Negative Accumulate
PFNACC mm1,mm2/m64 ; 0F 0F /r 8A [PENT,3DNOW]
PFNACC performs a negative accumulate of the two single-precision FP values in the source and destination registers. The result of the accumulate from the destination register is stored in the low doubleword of the destination, and the result of the source accumulate is stored in the high doubleword of the destination register.
The operation is:
dst[0-31] := dst[0-31] - dst[32-63],
dst[32-63] := src[0-31] - src[32-63].
Both operands are single-precision, floating-point operands with 24-bit significands.
Example:
pfnacc mm1 Label