PFPNACC
Usage: PFPNACC dest,src Modifies flags: None
Performs mixed negative and positive accumulation of the two doublewords of the 'dest' operand and the source operand. Then stores the results in the low and high words of the 'dest' operand, respectively.
Packed Single-Precision FP Mixed Accumulate
PFPNACC mm1,mm2/m64 ; 0F 0F /r 8E [PENT,3DNOW]
PFPNACC performs a positive accumulate of the two single-precision FP values in the source register and a negative accumulate of the destination register. The result of the accumulate from the destination register is stored in the low doubleword of the destination, and the result of the source accumulate is stored in the high doubleword of the destination register.
Both operands are single-precision, floating-point operands with 24-bit significands.
The operation is:
dst[0-31] := dst[0-31] - dst[32-63],
dst[32-63] := src[0-31] + src[32-63].
Example:
pfpnacc mm1 mm2
PFPNACC
Usage: PFPNACC dest,src Modifies flags: None
Performs mixed negative and positive accumulation of the two doublewords of the 'dest' operand and the source operand. Then stores the results in the low and high words of the 'dest' operand, respectively.
Packed Single-Precision FP Mixed Accumulate
PFPNACC mm1,mm2/m64 ; 0F 0F /r 8E [PENT,3DNOW]
PFPNACC performs a positive accumulate of the two single-precision FP values in the source register and a negative accumulate of the destination register. The result of the accumulate from the destination register is stored in the low doubleword of the destination, and the result of the source accumulate is stored in the high doubleword of the destination register.
Both operands are single-precision, floating-point operands with 24-bit significands.
The operation is:
dst[0-31] := dst[0-31] - dst[32-63],
dst[32-63] := src[0-31] + src[32-63].
Example:
pfpnacc mm1 mm2
PFPNACC
Usage: PFPNACC dest,src Modifies flags: None
Performs mixed negative and positive accumulation of the two doublewords of the 'dest' operand and the source operand. Then stores the results in the low and high words of the 'dest' operand, respectively.
Packed Single-Precision FP Mixed Accumulate
PFPNACC mm1,mm2/m64 ; 0F 0F /r 8E [PENT,3DNOW]
PFPNACC performs a positive accumulate of the two single-precision FP values in the source register and a negative accumulate of the destination register. The result of the accumulate from the destination register is stored in the low doubleword of the destination, and the result of the source accumulate is stored in the high doubleword of the destination register.
Both operands are single-precision, floating-point operands with 24-bit significands.
The operation is:
dst[0-31] := dst[0-31] - dst[32-63],
dst[32-63] := src[0-31] + src[32-63].
Example:
pfpnacc mm1 mm2