PFMUL
Usage: PFMUL dest,src Modifies flags: None
PFMUL is a vector instruction that performs multiplication of the 'dest' operand and the 'src' operand. Both operands are single-precision, floating-point operands with 24-bit significands.
Packed Single-Precision FP Multiply
PFMUL mm1,mm2/m64 ; 0F 0F /r B4 [PENT,3DNOW]
PFMUL returns the product of each pair of single-precision FP values.
dst[0-31] := dst[0-31] * src[0-31],
dst[32-63] := dst[32-63] * src[32-63].
Example:
pfmul mm2 mm1
PFMIN
Usage: PFMIN dest,src Modifies flags: None
Returns the smaller of the two single-precision, floating-point operands. Any operation with a zero and a positive number returns positive zero. An operation consisting of two zeros returns positive zero.
Packed Single-Precision FP Minimum
PFMIN mm1,mm2/m64 ; 0F 0F /r 94 [PENT,3DNOW]
PFMIN returns the lower of each pair of single-precision FP values. If the lower value is zero, it is returned as positive zero.
Example:
pfmin mm1 Label
PFMAX
Usage: PFMAX dest,src Modifies flags: None
Returns the larger of the two single-precision, floating-point operands. Any operation with a zero and a negative number returns positive zero. An operation consisting of two zeros returns positive zero.
Packed Single-Precision FP Maximum
PFMAX mm1,mm2/m64 ; 0F 0F /r A4 [PENT,3DNOW]
PFMAX returns the higher of each pair of single-precision FP values. If the higher value is zero, it is returned as positive zero.
Example:
pfmax mm1 mm2
PFCMPxx
Usage: PFCMPxx dest,src Modifies flags: None
A vector instruction that performs a comparison of the 'dest' operand and the 'src' operand and generates all one bits or all zero bits based on the result of the corresponding comparison.
Packed Single-Precision FP Compare
PFCMPEQ mm1,mm2/m64 ; 0F 0F /r B0 [PENT,3DNOW]
PFCMPGE mm1,mm2/m64 ; 0F 0F /r 90 [PENT,3DNOW]
PFCMPGT mm1,mm2/m64 ; 0F 0F /r A0 [PENT,3DNOW]
The PFCMPxx instructions compare the packed single-point FP values in the source and destination operands, and set the destination according to the result. If the condition is true, the destination is set to all 1s, otherwise it's set to all 0s.
PFCMPEQ tests whether dest == src. PFCMPGE tests whether dest >= src.
PFCMPGT tests whether dest > src.
Example:
pfcmpeq mm1 Label | pfcmpge mm1 mm2 | pfcmpgt mm2 mm1
PFADD
Usage: PFADD dest,src Modifies flags: None
Performs mixed negative and positive accumulation of the two doublewords of the 'dest' operand and the 'src' operand. Then stores the results in the low and high words of the 'dest' operand.
Packed Single-Precision FP Addition
PFADD mm1,mm2/m64 ; 0F 0F /r 9E [PENT,3DNOW]
PFADD performs addition on each of two packed single-precision FP value pairs.
dst[0-31] := dst[0-31] + src[0-31],
dst[32-63] := dst[32-63] + src[32-63].
Both operands are single-precision, floating-point operands with 24-bit significands.
Example:
pfadd mm1 mm2
PFACC
Usage: PFACC dest,src Modifies flags: None
Performs negative accumulation of the two doublewords of the 'dest' operand and the 'src' operand. Then stores the results in the low and high words of the 'dest' operand.
Packed Single-Precision FP Accumulate
PFACC mm1,mm2/m64 ; 0F 0F /r AE [PENT,3DNOW]
PFACC adds the two single-precision FP values from the destination operand together, then adds the two single-precision FP values from the source operand, and places the results in the low and high doublewords of the destination operand.
The operation is:
dst[0-31] := dst[0-31] + dst[32-63],
dst[32-63] := src[0-31] + src[32-63].
Both operands are single-precision, floating-point operands with 24-bit significands.
Example:
pfacc mm1 mm2
PF2IW
Usage: PF2IW dest,src Modifies flags: None
Converts a register containing single-precision floating-point operands to 16-bit signed integers using truncation. Arguments outside the range representable by signed 16-bit integers are saturated to the largest and smallest 16-bit integer, depending on their sign. All results are sign-extended to 32-bits.
Packed Word Integer to Single-Precision FP Convert
PI2FW mm1,mm2/m64 ; 0F 0F /r 0C [PENT,3DNOW]
PF2IW converts two signed 16-bit integers in the source operand to single-precision FP values, and stores them in the destination operand. The input values are in the low word of each doubleword.
See the PF2ID, PI2FW, and PI2FD instructions.
Example:
pf21w mm1 Label
PF2ID
Usage: PF21D dest,src Modifies flags: None
Converts a vector register containing single-precision, floating-point operands to 32-bit signed integers using truncation.
Packed Single-Precision FP to Integer Convert
PF2ID mm1,mm2/m64 ; 0F 0F /r 1D [PENT,3DNOW]
PF2ID converts two single-precision FP values in the source operand to signed 32-bit integers, using truncation, and stores them in the destination operand. Source values that are outside the range supported by the destination are saturated to the largest absolute value of the same sign.
Example:
pf2id mm1 mm2
PEXTRW
Usage: PEXTRW dest,src,count Modifies flags: None
Copies the word in the 'src' specified by the 'count' (third operand) to the 'dest' operand.
Extract Word
PEXTRW reg32,mm,imm8 ; 0F C5 /r ib [KATMAI,MMX]
PEXTRW reg32,xmm,imm8 ; 66 0F C5 /r ib [WILLAMETTE,SSE2]
PEXTRW moves the word in the source register (second operand) that is pointed to by the count operand (third operand), into the lower half of a 32-bit general purpose register. The upper half of the register is cleared to all 0s.
The 'src' operand can be an MMX technology register or an XMM register. The 'dest' operand is the low word of a general-purpose register. The 'count' operand is an 8-bit immediate. When specifying a word location in an MMX technology register, the 2 least-significant bits of the 'count' operand specify the location; for an XMM register, the 3 least-significant bits specify the location. The high word of the 'dest' operand is cleared (set to 0s).
When the source operand is an MMX register, the two least significant bits of the 'count' specify the source word. When it is an SSE register, the three least significant bits specify the word location.
EXAMPLE:
pextrw ecx xmm1 2
PCMPxxx
Usage: PCMPxxx dest,src Modifies flags: None
Performs an SIMD compare for equality of the packed bytes, words, or doublewords in the 'dest' operand and the 'src' operand. If a pair of data elements is equal, the corresponding data element in the 'dest' operand is set to all 1s; otherwise, it is set to all 0s.
Compare Packed Integers.
PCMPEQB / PCMPEQW / PCMPEQD / PCMPGTB/PCMPGTW/PCMPGTD
PCMPEQB mm1,mm2/m64 ; 0F 74 /r [PENT,MMX]
PCMPEQW mm1,mm2/m64 ; 0F 75 /r [PENT,MMX]
PCMPEQD mm1,mm2/m64 ; 0F 76 /r [PENT,MMX]
PCMPGTB mm1,mm2/m64 ; 0F 64 /r [PENT,MMX]
PCMPGTW mm1,mm2/m64 ; 0F 65 /r [PENT,MMX]
PCMPGTD mm1,mm2/m64 ; 0F 66 /r [PENT,MMX]
PCMPEQB xmm1,xmm2/m128 ; 66 0F 74 /r [WILLAMETTE,SSE2]
PCMPEQW xmm1,xmm2/m128 ; 66 0F 75 /r [WILLAMETTE,SSE2]
PCMPEQD xmm1,xmm2/m128 ; 66 0F 76 /r [WILLAMETTE,SSE2]
PCMPGTB xmm1,xmm2/m128 ; 66 0F 64 /r [WILLAMETTE,SSE2]
PCMPGTW xmm1,xmm2/m128 ; 66 0F 65 /r [WILLAMETTE,SSE2]
PCMPGTD xmm1,xmm2/m128 ; 66 0F 66 /r [WILLAMETTE,SSE2]
The PCMPxxx instructions all treat their operands as vectors of bytes, words, or doublewords; corresponding elements of the source and destination are compared, and the corresponding element of the destination (first) operand is set to all zeros or all ones depending on the result of the comparison.
The source operand can be an MMX technology register or a 64-bit memory location, or it can be an XMM register or a 128-bit memory location. The destination operand can be an MMX technology register or an XMM register.
PCMPxxB treats the operands as vectors of bytes.
PCMPxxW treats the operands as vectors of words.
PCMPxxD treats the operands as vectors of doublewords.
PCMPEQx sets the corresponding element of the destination operand to all ones if the two elements compared are equal.
PCMPGTx sets the destination element to all ones if the element of the first (destination) operand is greater (treated as a signed integer) than that of the second (source) operand.
PCMPEQB Compare packed bytes for equal
PCMPEQW Compare packed words for equal
PCMPEQD Compare packed doublewords for equal
PCMPGTB Compare packed signed byte integers for greater than
PCMPGTW Compare packed signed word integers for greater than
PCMPGTD Compare packed signed doubleword integers for greater than
EXAMPLE:
pcmpeqb xmm1 xmm2