HSUBPS
Usage: HSUBPS dest,src Modifies flags: None
Subtract horizontally packed SP FP numbers from 'src' to 'dest' stores the result in 'dest'.
Packed Single-FP Horizontal Subtract
HSUBPS xmm1,xmm2/mem128 ; F2 0F 7D /r [Pent4]
HSUBPS subtracts the single-precision floating-point value in the second dword of the 'dest' operand from the first dword of the 'dest' operand and stores the result in the first dword of the 'dest' operand. Subtracts the single-precision floating-point value in the fourth dword of the 'dest' operand from the third dword of the 'dest' operand and stores the result in the second dword of the 'dest' operand. Subtracts the single-precision floating-point value in the second dword of the 'src' operand from the first dword of the 'src' operand and stores the result in the third dword of the 'dest' operand. Subtracts the single-precision floating-point value in the fourth dword of the 'src' operand from the third dword of the 'src' operand and stores the result in the fourth dword of the dest' operand.
When the source operand is a memory operand, it must be aligned on a 16-byte boundary or a general-protection exception (#GP) will be generated.
xmm1[31-0] = xmm1[31-0] - xmm1[63-32];
xmm1[63-32] = xmm1[95-64] - xmm1[127-96];
xmm1[95-64] = xmm2/m128[31-0] - xmm2/m128[63-32];
xmm1[127-96] = xmm2/m128[95-64] - xmm2/m128[127-96]
EXAMPLE:
hsubps xmm1 xmm2
HSUBPD
Usage: HSUBPD dest,src Modifies flags: None
Subtract horizontally packed DP FP numbers from 'src' to 'dest' stores the result in 'dest'.
Packed Double-FP Horizontal Subtract
HSUBPD xmm1,xmm2/mem128 ; 66 0F 7D /r [Pent4]
HSUBPD subtracts horizontally the packed DP FP numbers of both operands. Subtracts the double-precision floating-point value in the high quadword of the 'dest' operand from the low quadword of the 'dest' operand and stores the result in the low quad-word of the 'dest' operand. Subtracts the double-precision floating-point value in the high quadword of the 'src' operand from the low quadword of the 'src' operand and stores the result in the high quadword of the 'dest' operand.
When the source operand is a memory operand, it must be aligned on a 16-byte boundary or a general-protection exception (#GP) will be generated.
xmm1[63-0] = xmm1[63-0] - xmm1[127-64];
xmm1[127-64] = xmm2/m128[63-0] - xmm2/m128[127-64]
EXAMPLE:
hsubpd xmm1 xmm2
HLT
Usage: HLT Modifies flags: None
Halts CPU until RESET line is activated, NMI or maskable interrupt received.
Halt Processor
HLT ; F4 [8086,PRIV]
HLT puts the processor into a halted state, where it will perform no more operations until restarted by an interrupt or a reset. The CPU becomes dormant but retains the current CS:EIP for later restart.
On the 286 and later processors, this is a privileged instruction.
Example:
hlt
HADDPS
Usage: HADDPS dest,src Modifies flags: None
Add horizontally packed SP FP numbers from 'src' to 'dest' stores the result in 'dest'.
Packed Single-FP Horizontal Add
HADDPS xmm1,xmm2/mem128 ; F2 0F 7C /r [Pent4]
HADDPS adds the single-precision floating-point values in the first and second dwords of the 'dest' operand and stores the result in the first dword of the 'dest' operand. Adds single-precision floating-point values in the third and fourth dword of the 'dest' operand and stores the result in the second dword of the 'dest' operand. Adds single-precision floating-point values in the first and second dword of the 'src' operand and stores the result in the third dword of the 'dest' operand. Adds single-precision floating-point values in the third and fourth dword of the 'src' operand and stores the result in the fourth dword of the 'dest' operand.
xmm1[31-0] = xmm1[31-0] + xmm1[63-32];
xmm1[63-32] = xmm1[95-64] + xmm1[127-96];
xmm1[95-64] = xmm2/m128[31-0] + xmm2/m128[63-32];
xmm1[127-96] = xmm2/m128[95-64] + xmm2/m128[127-96]
EXAMPLE:
haddps xmm1 xmm2
.
HADDPD
Usage: HADDPD dest,src Modifies flags: None
Add horizontally packed DP FP numbers from 'src' to 'dest' stores the result in 'dest'.
Packed Double-FP Horizontal Add
HADDPD xmm1,xmm2/mem128 ; 66 0F 7C /r [Pent4]
HADDPD adds the double-precision floating-point values in the high and low quadwords of the 'dest' operand and stores the result in the low quadword of the 'dest' operand. Adds the double-precision floating-point values in the high and low quadwords of the 'src' operand and stores the result in the high quadword of the 'dest' operand.
When the source operand is a memory operand, it must be aligned on a 16-byte boundary or a general-protection exception (#GP) will be generated.
xmm1[63-0] = xmm1[63-0] + xmm1[127-64];
xmm1[127-64] = xmm2/m128[63-0] + xmm2/m128[127-64];
EXAMPLE:
haddpd xmm1 Label
FYL2XP1
Usage: FYL2XP1 Modifies flags:See below.
Computes (ST(1) *log2 (ST(0) +1.0)), stores the result in register ST(1), and pops the FPU register stack.
Compute Y times Log2(X) or Log2(X+1)
FYL2X ; D9 F1 [8086,FPU]
FYL2XP1 ; D9 F9 [8086,FPU]
FYL2X multiplies ST1 by the base-2 logrithm of ST0, stores the result in ST1, and pops the register stack (so that the result ends up in ST0). ST0 must be non-zero and positive.
FYL2XP1 works the same way, but replacing the base-2 log of ST0 with that of ST0 plus one. This time, ST0 must have magnitude no greater than 1 minus half the square root of two.
FPU Flags Affected C1 Set to 0 if stack underflow occurred. Set if result was rounded up; cleared otherwise. C0, C2, C3 Undefined.
EXAMPLE:
fyl2xp1
FYL2X
Usage: FYL2X Modifies flags:See below.
Computes (ST(1) *log2 (ST(0))), stores the result in resister ST(1), and pops the FPU register stack. The source operand in ST(0) must be a non-zero positive number.
Compute Y times Log2(X) or Log2(X+1)
FYL2X ; D9 F1 [8086,FPU]
FYL2XP1 ; D9 F9 [8086,FPU]
FYL2X multiplies ST1 by the base-2 logarithm of ST0, stores the result in ST1, and pops the register stack (so that the result ends up in ST0). ST0 must be non-zero and positive.
FYL2XP1 works the same way, but replacing the base-2 log of ST0 with that of ST0 plus one. This time, ST0 must have magnitude no greater than 1 minus half the square root of two.
FPU Flags Affected C1 Set to 0 if stack underflow occurred. Set if result was rounded up; cleared otherwise. C0, C2, C3 Undefined.
EXAMPLE:
fyl2xp
FXTRACT
Usage: FXTRACT Modifies flags: See below.
Separates the 'src' value in the ST(0) register into its exponent and significand, stores the exponent in ST(0), and pushes the significand onto the register stack. Following this operation, the new top-of-stack register ST(0) contains the value of the original significand expressed as a floating-point value.
Extract Exponent and Significand
FXTRACT ; D9 F4 [8086,FPU]
FXTRACT separates the number in ST0 into its exponent and significand (mantissa), stores the exponent back into ST0, and then pushes the significand on the register stack (so that the significand ends up in ST0, and the exponent in ST1).
The sign and significand of this value are the same as those found in the source operand, and the exponent is 3FFFH (biased value for a true exponent of zero). The ST(1) register contains the value of the original operand's true (unbiased) exponent expressed as a floating-point value. (The operation performed by this instruction is a superset of the IEEE-recommended logb(x) function.) This instruction and the F2XM1 instruction are useful for performing power and range scaling.
FPU Flags Affected C1 Set to 0 if stack underflow occurred; set to 1 if stack overflow occurred. C0, C2, C3 Undefined.
EXAMPLE:
fxtract
FXSAVE
Usage: FXSAVE dest Modifies flags: None
Saves the current state of the x87 FPU, MMX technology, XMM, and MXCSR registers to a 512-byte memory location specified in the destination operand.
Store FP,MMX and SSE State
FXSAVE memory ; 0F AE /0 [P6,SSE,FPU]
The FXSAVE instruction writes the current FPU, MMX and SSE technology states (environment and registers), to the 512 byte memory area defined by the destination operand. It does this without checking for pending unmasked floating-point exceptions (similar to the operation of FNSAVE).
Unlike the FSAVE/FNSAVE instructions, the processor retains the contents of the FPU, MMX and SSE states in the processor after the state has been saved. This instruction has been optimized to maximize the floating-point save performance.
After the FXSAVE instruction has saved the state of the x87 FPU, MMX technology, XMM, and MXCSR registers, the processor retains the contents of the registers. Because of this behavior, the FXSAVE instruction cannot be used by an application program to pass a 'clean' x87 FPU state to a procedure, since it retains the current state. To clean the x87 FPU state, an application must explicitly execute an FINIT instruction after an FXSAVE instruction to reinitialize the x87 FPU state.
EXAMPLE:
fxsave label
FXRSTOR
Usage: FXRSTOR src Modifies flags: None
Reloads the x87 FPU, MMX technology, XMM, and MXCSR registers from the 512-byte memory image specified in the source operand. the first byte of the data should be located on a 16-byte boundary.
Restore FP, MMX and SSE State
FXRSTOR memory ; 0F AE /1 [P6,SSE,FPU]
The FXRSTOR instruction reloads the FPU, MMX and SSE state (environment and registers), from the 512 byte memory area defined by the source operand. This data should have been written by a previous FXSAVE.
EXAMPLE:
fxrstor Label