INT01
Usage: INT01 Modifies flags: None
Instruction used by in-circuit emulators (ICEs) as breakpoint.
Breakpoints
INT1 ; F1 [P6]
ICEBP ; F1 [P6]
INT01 ; F1 [P6]
INT3 ; CC [8086]
INT03 ; CC [8086]
INT1 and INT3 are short one-byte forms of the instructions INT 1 and INT 3 (see INT). They perform a similar function to their longer counterparts, but take up less code space. They are used as breakpoints by debuggers.
INT1, and its alternative synonyms INT01 and ICEBP, is an instruction used by in-circuit emulators (ICEs). It is present, though not documented, on some processors down to the 286, but is only documented for the Pentium Pro. INT3 is the instruction normally used as a breakpoint by debuggers.
INT3, and its synonym INT03, is not precisely equivalent to INT 3: the short form, since it is designed to be used as a breakpoint, bypasses the normal IOPL checks in virtual-8086 mode, and also does not go through interrupt redirection.
Example:
int01
INT
Usage: INT num Modifies flags: TF IF
Initiates a software interrupt by pushing the flags, clearing the Trap and Interrupt Flags, pushing CS followed by IP and loading CS:IP with the value found in the interrupt vector table. Execution then begins at the location addressed by the new CS:IP
Software Interrupt
INT imm8 ; CD ib [8086]
INT causes a software interrupt through a specified vector number from 0 to 255.
Each interrupt vector number provides an index to a gate descriptor in the IDT. The first 32 interrupt vector numbers are reserved by Intel for system use. Some of these interrupts are used for internally generated exceptions.
The code generated by the INT instruction is always two bytes long: although there are short forms for some INT instructions, ROSASM does not generate them when it sees the INT mnemonic. In order to generate single-byte breakpoint instructions, use the INT3 or INT1 instructions (see INT1) instead.
Example:
int 128
INSW
Usage: INSW Modifies flags: None
Loads word from port to the 'dest' ES:(E)DI (even if a destination operand is supplied). (E)DI is adjusted by the size of the operand and increased if the DF flag is cleared and decreased if the DF flag is set.
Input String from I/O Port
INSB ; 6C [186]
INSW ; o16 6D [186]
INSD ; o32 6D [386]
INSB inputs a byte from the I/O port specified in DX and stores it at [ES:DI] or [ES:EDI]. It then increments or decrements (depending on the direction flag: increments if the flag is clear, decrements if it is set) DI or EDI.
The register used is DI if the address size is 16 bits, and EDI if it is 32 bits. If you need to use an address size not equal to the current BITS setting, you can use an explicit a16 or a32 prefix. For INSB, INSW, INSD no operands are allowed and the size is determined by the mnemonic, the port by DX. Segment override prefixes have no effect for this instruction: the use of ES for the load from [DI] or [EDI] cannot be overridden.
INSW and INSD work in the same way, but they input a word or a doubleword instead of a byte, and increment or decrement the addressing register by 2 or 4 instead of 1.
The REP prefix may be used to repeat the instruction CX (or ECX - again, the address size chooses which) times. See also OUTSB, OUTSW and OUTSD.
Example:
mov dx Port
insw
INSD
Usage: INSD Modifies flags: None
Loads doubleword from port to the 'dest' ES:(E)DI (even if a destination operand is supplied). (E)DI is adjusted by the size of the operand and increased if the DF flag is cleared and decreased if the DF flag is set.
Input String from I/O Port
INSB ; 6C [186]
INSW ; o16 6D [186]
INSD ; o32 6D [386]
INSB inputs a byte from the I/O port specified in DX and stores it at [ES:DI] or [ES:EDI]. It then increments or decrements (depending on the direction flag: increments if the flag is clear, decrements if it is set) DI or EDI.
The register used is DI if the address size is 16 bits, and EDI if it is 32 bits. If you need to use an address size not equal to the current BITS setting, you can use an explicit a16 or a32 prefix. For INSB, INSW, INSD no operands are allowed and the size is determined by the mnemonic, the port by DX.
Segment override prefixes have no effect for this instruction: the use of ES for the load from [DI] or [EDI] cannot be overridden. INSW and INSD work in the same way, but they input a word or a doubleword instead of a byte, and increment or decrement the addressing register by 2 or 4 instead of 1.
The REP prefix may be used to repeat the instruction CX (or ECX - again, the address size chooses which) times. See also OUTSB, OUTSW and OUTSD.
Example:
mov dx Port
insd
INSB
Usage: INSB Modifies flags: None
Loads data from port to the 'dest' ES:(E)DI (even if a destination operand is supplied). (E)DI is adjusted by the size of the operand and increased if the DF flag is cleared and decreased if the DF flag is set.
Input String from I/O Port
INSB ; 6C [186]
INSW ; o16 6D [186]
INSD ; o32 6D [386]
INSB inputs a byte from the I/O port specified in DX and stores it at [ES:DI] or [ES:EDI]. It then increments or decrements (depending on the direction flag: increments if the flag is clear, decrements if it is set) DI or EDI.
The register used is DI if the address size is 16 bits, and EDI if it is 32 bits. If you need to use an address size not equal to the current BITS setting, you can use an explicit a16 or a32 prefix. For INSB, INSW, INSD no operands are allowed and the size is determined by the mnemonic, the port by DX. Segment override prefixes have no effect for this instruction: the use of ES for the load from [DI] or [EDI] cannot be overridden.
INSW and INSD work in the same way, but they input a word or a doubleword instead of a byte, and increment or decrement the addressing register by 2 or 4 instead of 1.
The REP prefix may be used to repeat the instruction CX (or ECX - again, the address size chooses which) times. See also OUTSB, OUTSW and OUTSD.
Example:
mov dx Port
insb
INC
Usage: INC dest Modifies flags: AF OF PF SF ZF
Adds one to destination unsigned binary operand.
Increment Integer
INC reg16 ; o16 40+r [8086]
INC reg32 ; o32 40+r [386]
INC r/m8 ; FE /0 [8086]
INC r/m16 ; o16 FF /0 [8086]
INC r/m32 ; o32 FF /0 [386]
INC adds 1 to its operand. It does not affect the carry flag: to affect the carry flag, use ADD something,1. INC affects all the other flags according to the result.
This instruction can be used with a LOCK prefix to allow atomic execution.
See also DEC.
Example:
pop ecx | inc ecx | cmp ecx 0 | ja LABEL
IN
Usage: IN accum,port Modifies flags: None
A byte, word or dword is read from 'port' and placed in AL, AX or EAX respectively. If the port number is in the range of 0-255 it can be specified as an immediate, otherwise the port number must be specified in DX. Input from I/O Port
IN AL,imm8 ; E4 ib [8086]
IN AX,imm8 ; o16 E5 ib [8086]
IN EAX,imm8 ; o32 E5 ib [386]
IN AL,DX ; EC [8086]
IN AX,DX ; o16 ED [8086]
IN EAX,DX ; o32 ED [386]
IN reads a byte, word or doubleword from the specified I/O port, and stores it in the given destination register. The port number may be specified as an immediate value if it is between 0 and 255, and otherwise must be stored in DX. Valid port ranges on the PC are 0-1024, though values through 65535 may be specified and recognized by third party vendors and PS/2's. See also OUT.
Example:
in eax 220
IMUL
Usage: IMUL src Modifies flags: CF OF (AF,PF,SF,ZF undefined)
IMUL src,immed (286+)
IMUL dest,src,immed8 (286+)
IMUL dest,src (386+)
Signed multiplication of accumulator by 'src' with result placed in the accumulator. If the 'src' operand is a byte value, its multiplied by AL and the result stored in AX. If the 'src' operand is a word value it is multiplied by AX and the result is stored in DX:AX. If the 'src' operand is a doubleword value it is multiplied by EAX and the result is stored in EDX:EAX. Other variations of this instruction allow specification of 'src' and 'dest' registers as well as a third immediate factor.
Signed Integer Multiply
IMUL r/m8 ; F6 /5 [8086]
IMUL r/m16 ; o16 F7 /5 [8086]
IMUL r/m32 ; o32 F7 /5 [386]
IMUL reg16,r/m16 ; o16 0F AF /r [386]
IMUL reg32,r/m32 ; o32 0F AF /r [386]
IMUL reg16,imm8 ; o16 6B /r ib [186]
IMUL reg16,imm16 ; o16 69 /r iw [186]
IMUL reg32,imm8 ; o32 6B /r ib [386]
IMUL reg32,imm32 ; o32 69 /r id [386]
IMUL reg16,r/m16,imm8 ; o16 6B /r ib [186]
IMUL reg16,r/m16,imm16 ; o16 69 /r iw [186]
IMUL reg32,r/m32,imm8 ; o32 6B /r ib [386]
IMUL reg32,r/m32,imm32 ; o32 69 /r id [386]
IMUL performs signed integer multiplication. For the single-operand form, the other operand and destination are implicit, in the following way:
For IMUL r/m8, AL is multiplied by the given operand; the product is stored in AX.
For IMUL r/m16, AX is multiplied by the given operand; the product is stored in DX:AX.
For IMUL r/m32, EAX is multiplied by the given operand; the product is stored in EDX:EAX.
The two-operand form multiplies its two operands and stores the result in the destination (first) operand. The three-operand form multiplies its last two operands and stores the result in the first operand.
The two-operand form with an immediate second operand is in fact a shorthand for the three-operand form, as can be seen by examining the opcode descriptions: in the two-operand form, the code /r takes both its register and r/m parts from the same operand (the first one).
In the forms with an 8-bit immediate operand and another longer source operand, the immediate operand is considered to be signed, and is sign-extended to the length of the other source operand. In these cases, the BYTE qualifier is necessary to force NASM to generate this form of the instruction.
Unsigned integer multiplication is performed by the MUL instruction.
Example:
imul eax ecx
IDIV
Usage: IDIV src Modifies flags: (AF,CF,OF,PF,SF,ZF undefined)
Signed binary division of accumulator by 'src'. If 'src' is a byte value, AX is divided by 'src' and the quotient is stored in AL and the remainder in AH. If 'src' is a word value, DX:AX is divided by 'src', and the quotient is stored in AL and the remainder in DX. If 'src' operand is a doubleword value, then EDX:EAX is divided by 'src' and the quotient is stored in EAX and the remainder in EDX.
Signed Integer Divide
IDIV r/m8 ; F6 /7 [8086]
IDIV r/m16 ; o16 F7 /7 [8086]
IDIV r/m32 ; o32 F7 /7 [386]
IDIV performs signed integer division. The explicit operand provided is the divisor; the dividend and destination operands are implicit, in the following way:
For IDIV r/m8, AX is divided by the given operand; the quotient is stored in AL and the remainder in AH.
For IDIV r/m16, DX:AX is divided by the given operand; the quotient is stored in AX and the remainder in DX.
For IDIV r/m32, EDX:EAX is divided by the given operand; the quotient is stored in EAX and the remainder in EDX.
Unsigned integer division is performed by the DIV instruction.
Example:
idiv Label
ICEBP
Usage: ICEBP Modifies flags: None
Instruction used by in-circuit emulators (ICEs) as breakpoint.
Breakpoints
INT1 ; F1 [P6]
ICEBP ; F1 [P6]
INT01 ; F1 [P6]
INT3 ; CC [8086]
INT03 ; CC [8086]
INT1 and INT3 are short one-byte forms of the instructions INT 1 and INT 3 (see INT). They perform a similar function to their longer counterparts, but take up less code space. They are used as breakpoints by debuggers.
INT1, and its alternative synonyms INT01 and ICEBP, is an instruction used by in-circuit emulators (ICEs). It is present, though not documented, on some processors down to the 286, but is only documented for the Pentium Pro. INT3 is the instruction normally used as a breakpoint by debuggers.
INT3, and its synonym INT03, is not precisely equivalent to INT 3: the short form, since it is designed to be used as a breakpoint, bypasses the normal IOPL checks in virtual-8086 mode, and also does not go through interrupt redirection.
Example:
icebp