CMOVcc
Usage:CMOVcc dest, src Modifies flags: None
The CMOVcc instructions check the state of one or more of the status flags in the EFLAGS register (CF, OF, PF, SF, and ZF) and perform a move operation if the flags are in a specified state (or condition). A condition code (cc) is associated with each instruction to indicate the condition being tested for. If the condition is not satisfied, a move is not performed and execution continues with the instruction following the CMOVcc instruction.
Conditional Move
CMOVcc reg16,r/m16 ; o16 0F 40+cc /r [P6]
CMOVcc reg32,r/m32 ; o32 0F 40+cc /r [P6]
CMOV moves its source (second) operand into its destination (first) operand if the given condition code is satisfied; otherwise it does nothing.
Although the CMOV instructions are flagged P6 and above, they may not be supported by all Pentium Pro processors; the CPUID instruction () will return a bit which indicates whether conditional moves are supported.
CMOVE/CMOVZ Conditional move if equal/Conditional move if zero
CMOVNE/CMOVNZ Conditional move if not equal/Conditional move if not zero
CMOVA/CMOVNBE Conditional move if above/Conditional move if not below or equal
CMOVAE/CMOVNB Conditional move if above or equal/Conditional move if not below
CMOVB/CMOVNAE Conditional move if below/Conditional move if not above or equal
CMOVBE/CMOVNA Conditional move if below or equal/Conditional move if not above
CMOVG/CMOVNLE Conditional move if greater/Conditional move if not less or equal
CMOVGE/CMOVNL Conditional move if greater or equal/Conditional move if not less
CMOVL/CMOVNGE Conditional move if less/Conditional move if not greater or equal
CMOVLE/CMOVNG Conditional move if less or equal/Conditional move if not greater
CMOVC Conditional move if carry
CMOVNC Conditional move if not carry
CMOVO Conditional move if overflow
CMOVNO Conditional move if not overflow
CMOVS Conditional move if sign (negative)
CMOVNS Conditional move if not sign (non-negative)
CMOVP/CMOVPE Conditional move if parity/Conditional move if parity even
CMOVNP/CMOVPO Conditional move if not parity/Conditional move if parity odd
EXAMPLE:
cmovnc eax Label
CMC
Usage: CMC Modifies flags: CF
Toggles (inverts) the Carry Flag.
Complement Carry Flag
CMC ; F5 [8086]
CMC changes the value of the carry flag: if it was 0, it sets it to 1, and vice versa.
EXAMPLE:
cmc
CLTS
Usage: CLTS Modifies flags: None
Clears the Task Switched Flag in the Machine Status Register. This is a privileged operation and is generally used only by operating system code.
Clear Flags
CLC ; F8 [8086]
CLD ; FC [8086]
CLI ; FA [8086]
CLTS ; 0F 06 [286,PRIV]
These instructions clear various flags. CLC clears the carry flag; CLD clears the direction flag; CLI clears the interrupt flag (thus disabling interrupts); and CLTS clears the task-switched (TS) flag in CR0.
To set the carry, direction, or interrupt flags, use the STC, STD and STI instructions. To invert the carry flag, use CMC.
Example:
clts
CLI
Usage: CLI Modifies flags: IF
Disables the maskable hardware interrupts by clearing the Interrupt flag. NMI's and software interrupts are not inhibited.
Clear Flags
CLC ; F8 [8086]
CLD ; FC [8086]
CLI ; FA [8086]
CLTS ; 0F 06 [286,PRIV]
These instructions clear various flags. CLC clears the carry flag; CLD clears the direction flag; CLI clears the interrupt flag (thus disabling interrupts); and CLTS clears the task-switched (TS) flag in CR0.
To set the carry, direction, or interrupt flags, use the STC, STD and STI instructions. To invert the carry flag, use CMC.
Example:
cli
CLFLUSH
Usage: CLFLUSH src Modifies flags:
Invalidates the cache line in 'src' and broadcasts throughout the cache coherence domain. If, at any level of the cache hierarchy, the line is inconsistent with memory (dirty) it is written to memory before invalidation. The 'src' operand is a byte memory location.
Flush Cache Line
CLFLUSH mem ; 0F AE /7 [WILLAMETTE,SSE2]
CLFLUSH invalidates the cache line that contains the linear address specified by the source operand from all levels of the processor cache hierarchy (data and instruction). If, at any level of the cache hierarchy, the line is inconsistent with memory (dirty) it is written to memory before invalidation. The source operand points to a byte-sized memory location.
Although CLFLUSH is flagged SSE2 and above, it may not be present on all processors which have SSE2 support, and it may be supported on other processors; the CPUID instruction will return a bit which indicates support for the CLFLUSH instruction.
Example:
clflush Label
CLD
Usage: CLD Modifies flags: DF
Clears the Direction Flag causing string instructions to increment the SI and DI index registers.
Clear Flags
CLC ; F8 [8086]
CLD ; FC [8086]
CLI ; FA [8086]
CLTS ; 0F 06 [286,PRIV]
These instructions clear various flags. CLC clears the carry flag; CLD clears the direction flag; CLI clears the interrupt flag (thus disabling interrupts); and CLTS clears the task-switched (TS) flag in CR0.
To set the carry, direction, or interrupt flags, use the STC, STD and STI instructions. To invert the carry flag, use CMC.
Example:
std
Do
mov al bl | and al 0F | add al '0'
On al > '9', add al 7
stosb | shr ebx 4
Do_Loop
cld
CLC
Usage: CLC Modifies flags: CF
Clears the Carry Flag.
Clear Flags
CLC ; F8 [8086]
CLD ; FC [8086]
CLI ; FA [8086]
CLTS ; 0F 06 [286,PRIV]
These instructions clear various flags. CLC clears the carry flag; CLD clears the direction flag; CLI clears the interrupt flag (thus disabling interrupts); and CLTS clears the task-switched (TS) flag in CR0.
To set the carry, direction, or interrupt flags, use the STC, STD and STI instructions. To invert the carry flag, use CMC.
Example:
clc
CDQ
Usage: CDQ Modifies flags: None
Converts signed DWORD in EAX to a signed quad word in EDX:EAX by extending the high order bit of EAX throughout EDX.
Sign Extensions
CBW ; o16 98 [8086]
CWDE ; o32 98 [386]
CWD ; o16 99 [8086]
CDQ ; o32 99 [386]
All these instructions sign-extend a short value into a longer one, by replicating the top bit of the original value to fill the extended one.
CBW extends AL into AX by repeating the top bit of AL in every bit of AH. CWDE extends AX into EAX. CWD extends AX into DX:AX by repeating the top bit of AX throughout DX, and CDQ extends EAX into EDX:EAX.
EXAMPLE:
mov eax 00_1111_1111_1111_1111_1111_1111_1111_1111
xor edx edx
mov ax 001110
cdq ; edx=FFFF FFFF eax=FFFF 000E
CBW
Usage: CBW Modifies flags: None
Converts byte in AL to word Value in AX by extending sign of AL throughout register AH.
Sign Extensions
CBW ; o16 98 [8086]
CWDE ; o32 98 [386]
CWD ; o16 99 [8086]
CDQ ; o32 99 [386]
All these instructions sign-extend a short value into a longer one, by replicating the top bit of the original value to fill the extended one.
CBW extends AL into AX by repeating the top bit of AL in every bit of AH. CWDE extends AX into EAX. CWD extends AX into DX:AX by repeating the top bit of AX throughout DX, and CDQ extends EAX into EDX:EAX.
EXAMPLE:
mov eax 10
mov al 0FF
cbw ; eax = FFFFh
CALL
Usage: CALL dest Modifies flags: None
Pushes Instruction Pointer onto stack and loads Instruction Pointer with the address of proc-name.
Code continues with execution at EIP upon RET.
Call Subroutine
CALL imm ; E8 rw/rd [8086]
CALL imm:imm16 ; o16 9A iw iw [8086]
CALL imm:imm32 ; o32 9A id iw [386]
CALL FAR mem16 ; o16 FF /3 [8086]
CALL FAR mem32 ; o32 FF /3 [386]
CALL r/m16 ; o16 FF /2 [8086]
CALL r/m32 ; o32 FF /2 [386]
CALL calls a subroutine, by means of pushing the current instruction pointer (IP) and optionally CS as well on the stack, and then jumping to a given address.
CS is pushed as well as IP if and only if the call is a far call, i.e. a destination segment address is specified in the instruction. The forms involving two colon-separated arguments are far calls; so are the CALL FAR mem forms.
The immediate call takes one of two forms (call imm16/imm32, determined by the current segment size limit. For 16-bit operands, you would use CALL 0x1234, and for 32-bit operands you would use CALL 0x12345678. The value passed as an operand is a relative offset.
You can choose between the two immediate call forms (CALL imm:imm) by the use of the WORD and DWORD keywords:
CALL WORD 0x1234:0x5678) or CALL DWORD 0x1234:0x56789abc.
The CALL FAR mem forms execute a far call by loading the destination address out of memory. The address loaded consists of 16 or 32 bits of offset (depending on the operand size), and 16 bits of segment. The operand size may be overridden using:
CALL WORD FAR mem or CALL DWORD FAR mem.
The CALL r/m forms execute a call (within the same segment), loading the destination address out of memory or out of a register. The keyword NEAR may be specified, for clarity, in these forms, but is not necessary. Again, operand size can be overridden using CALL WORD mem or CALL DWORD mem.
Example:
If B$WriteCheckerWanted = &TRUE
cmp eax 32 | je L1>
cmp eax CR | je L1>
cmp eax ',' | je L1>
cmp eax 8 | je L1>
cmp eax Tab | jne L0>
L1: call Label