CMPXCHG8B
Usage: CMPEXHG8B dest,src Modifies flags: ZF
Compares the accumulator (64 bits) with 'dest'. If equal the 'dest' is loaded with 'src', otherwise the accumulator is loaded with 'dest'.
Compare and Exchange Eight Bytes
CMPXCHG8B mem ; 0F C7 /1 [PENT]
This is a larger and more unwieldy version of CMPXCHG: it compares the 64-bit (eight-byte) value stored at [mem] with the value in EDX:EAX. If they are equal, it sets the zero flag and stores ECX:EBX into the memory area. If they are unequal, it clears the zero flag and stores the memory contents into EDX:EAX.
CMPXCHG8B can be used with the LOCK prefix, to allow atomic execution. This is useful in multi-processor and multi-tasking environments.
EXAMPLE:
mov D$Test 15
mov eax 55
mov ecx 20
cmpxchg8b Q$Test ; eax = 15d > 0Fh
CMPXCHG
Usage: CMPXCHG dest,src Modifies flags: AF CF OF PF SF ZF
Compares the accumulator (8-32 bits) with 'dest'. If equal the 'dest' is loaded with 'src', otherwise the accumulator is loadedwith 'dest'.
Compare and Exchange
CMPXCHG r/m8,reg8 ; 0F B0 /r [PENT]
CMPXCHG r/m16,reg16 ; o16 0F B1 /r [PENT]
CMPXCHG r/m32,reg32 ; o32 0F B1 /r [PENT]
CMPXCHG compares its destination (first) operand to the value in AL, AX or EAX (depending on the operand size of the instruction). If they are equal, it copies its source (second) operand into the destination and sets the zero flag. Otherwise, it clears the zero flag and copies the destination register to AL, AX or EAX.
The destination can be either a register or a memory location. The source is a register.
CMPXCHG is intended to be used for atomic operations in multitasking or multiprocessor environments. To safely update a value in shared memory, for example, you might load the value into EAX, load the updated value into EBX, and then execute the instruction LOCK CMPXCHG [value],EBX. If value has not changed since being loaded, it is updated with your desired new value, and the zero flag is set to let you know it has worked. (The LOCK prefix prevents another processor doing anything in the middle of this operation: it guarantees atomicity.) However, if another processor has modified the value in between your load and your attempted store, the store does not happen, and you are notified of the failure by a cleared zero flag, so you can go round and try again.
EXAMPLE:
mov eax 10
mov ebx 15
cmpxchg ebx eax ;eax =0Fh
CMPSW
Usage: CMPSW dest,src Modifies flags: AF CF OF PF SF ZF
Subtracts 'dest' value from 'src' without saving results. Updates flags based on the subtraction and the index registers (E)SI and (E)DI are incremented or decremented depending on the state of the Direction Flag. CMPSW increments or decrements by 2.
Compare Strings
CMPSB ; A6 [8086]
CMPSW ; o16 A7 [8086]
CMPSD ; o32 A7 [386]
CMPSB compares the byte at [DS:SI] or [DS:ESI] with the byte at [ES:DI] or [ES:EDI], and sets the flags accordingly. It then increments or decrements (depending on the direction flag: increments if the flag is clear, decrements if it is set) SI and DI (or ESI and EDI).
The registers used are SI and DI if the address size is 16 bits, and ESI and EDI if it is 32 bits. If you need to use an address size not equal to the current BITS setting, you can use an explicit a16 or a32 prefix.
The segment register used to load from [SI] or [ESI] can be overridden by using a segment register name as a prefix (for example, ES CMPSB). The use of ES for the load from [DI] or [EDI] cannot be overridden.
CMPSW and CMPSD work in the same way, but they compare a word or a doubleword instead of a byte, and increment or decrement the addressing registers by 2 or 4 instead of 1.
The REPE and REPNE prefixes (equivalently, REPZ and REPNZ) may be used to repeat the instruction up to CX (or ECX - again, the address size chooses which) times until the first unequal or equal byte is found.
Example:
push esi edi
mov ecx 0FF, eax 0 | inc ebx
repe cmpsw
mov al B$edi-1, ah B$esi-1
pop edi esi
CMPSD
Usage: CMPSD dest,src Modifies flags: AF CF OF PF SF ZF
Subtracts destination value from source without saving results. Updates flags based on the subtraction and the index registers (E)SI and (E)DI are incremented or decremented depending on the state of the Direction Flag. CMPSD increments or decrements by 4.
Compare Strings
CMPSB ; A6 [8086]
CMPSW ; o16 A7 [8086]
CMPSD ; o32 A7 [386]
CMPSB compares the byte at [DS:SI] or [DS:ESI] with the byte at [ES:DI] or [ES:EDI], and sets the flags accordingly. It then increments or decrements (depending on the direction flag: increments if the flag is clear, decrements if it is set) SI and DI (or ESI and EDI).
The registers used are SI and DI if the address size is 16 bits, and ESI and EDI if it is 32 bits. If you need to use an address size not equal to the current BITS setting, you can use an explicit a16 or a32 prefix.
The segment register used to load from [SI] or [ESI] can be overridden by using a segment register name as a prefix (for example, ES CMPSB). The use of ES for the load from [DI] or [EDI] cannot be overridden.
CMPSW and CMPSD work in the same way, but they compare a word or a doubleword instead of a byte, and increment or decrement the addressing registers by 2 or 4 instead of 1.
The REPE and REPNE prefixes (equivalently, REPZ and REPNZ) may be used to repeat the instruction up to CX (or ECX - again, the address size chooses which) times until the first unequal or equal byte is found.
Example:
push esi edi
mov ecx 0FF, eax 0 | inc ebx
repe cmpsd
mov al B$edi-1, ah B$esi-1
pop edi esi
CMPSB
Usage: CMPSB dest,src Modifies flags: AF CF OF PF SF ZF
Subtracts 'dest' value from 'src' without saving results. Updates flags based on the subtraction and the index registers (E)SI and (E)DI are incremented or decremented depending on the state of the Direction Flag. CMPSB inc/decrements the index registers by 1.
Compare Strings
CMPSB ; A6 [8086]
CMPSW ; o16 A7 [8086]
CMPSD ; o32 A7 [386]
CMPSB compares the byte at [DS:SI] or [DS:ESI] with the byte at [ES:DI] or [ES:EDI], and sets the flags accordingly. It then increments or decrements (depending on the direction flag: increments if the flag is clear, decrements if it is set) SI and DI (or ESI and EDI).
The registers used are SI and DI if the address size is 16 bits, and ESI and EDI if it is 32 bits. If you need to use an address size not equal to the current BITS setting, you can use an explicit a16 or a32 prefix.
The segment register used to load from [SI] or [ESI] can be overridden by using a segment register name as a prefix (for example, ES CMPSB). The use of ES for the load from [DI] or [EDI] cannot be overridden.
CMPSW and CMPSD work in the same way, but they compare a word or a doubleword instead of a byte, and increment or decrement the addressing registers by 2 or 4 instead of 1.
The REPE and REPNE prefixes (equivalently, REPZ and REPNZ) may be used to repeat the instruction up to CX (or ECX - again, the address size chooses which) times until the first unequal or equal byte is found.
Example:
push esi edi
mov ecx 0FF, eax 0 | inc ebx
repe cmpsb
mov al B$edi-1, ah B$esi-1
pop edi esi
CMPccSS
Usage: CMPccSS dest,src,cmppred Modifies flags: None
Compares the low-order single-precision FP values in the 'src' and 'dest' operands, and returns the result in the 'dest' register. The result of each comparison is a doubleword mask of all 1s (true) or all 0s (false).
Scalar Single-Precision FP Compare
CMPEQSS CMPLTSS CMPLESS CMPUNORDSS CMPNEQSS CMPNLTSS CMPNLESS CMPORDSS
CMPSS xmm1,xmm2/mem32,imm8 ; F3 0F C2 /r ib [KATMAI,SSE]
CMPEQSS xmm1,xmm2/mem32 ; F3 0F C2 /r 00 [KATMAI,SSE]
CMPLTSS xmm1,xmm2/mem32 ; F3 0F C2 /r 01 [KATMAI,SSE]
CMPLESS xmm1,xmm2/mem32 ; F3 0F C2 /r 02 [KATMAI,SSE]
CMPUNORDSS xmm1,xmm2/mem32 ; F3 0F C2 /r 03 [KATMAI,SSE]
CMPNEQSS xmm1,xmm2/mem32 ; F3 0F C2 /r 04 [KATMAI,SSE]
CMPNLTSS xmm1,xmm2/mem32 ; F3 0F C2 /r 05 [KATMAI,SSE]
CMPNLESS xmm1,xmm2/mem32 ; F3 0F C2 /r 06 [KATMAI,SSE]
CMPORDSS xmm1,xmm2/mem32 ; F3 0F C2 /r 07 [KATMAI,SSE]
Compares the low single-precision floating-point values in the 'src' operand and the 'dest' first operand and returns the results of the comparison to the 'dest' operand. The 'comparison predicate' operand (third operand) specifies the type of comparison performed. The comparison result is a doubleword mask of all 1s (comparison true) or all 0s (comparison false). The result is stored in the low doubleword of the 'dest' operand; the 3 high-order doublewords remain unchanged. The 'comparison predicate' operand is an 8-bit immediate the first 3 bits of which define the type of comparison to be made bits 4 through 7 of the immediate are reserved.
The destination is an XMM register. The source can be either an XMM register or a 128-bit memory location.
The third operand is an 8-bit immediate value, of which the low 3 bits define the type of comparison. For ease of programming, the 8 two-operand pseudo-instructions are provided, with the third operand already filled in.
The Condition Predicates are:
EQ 0 Equal
LT 1 Less-than
LE 2 Less-than-or-equal
UNORD 3 Unordered
NE 4 Not-equal
NLT 5 Not-less-than
NLE 6 Not-less-than-or-equal
ORD 7 Ordered
For more details of the comparison predicates, and details of how to emulate the 'greater-than' equivalents, see SSE-cc
EXAMPLE:
cmpss xmm1 xmm2 1
CMPccSD
Usage: CMPccSD dest,src,cmppred Modifies flags: None
Compares the low-order double-precision FP values in the 'src' and 'dest' operands, and returns the result in the 'dest' register. The result of each comparison is a quadword mask of all 1s (true) or all 0s (false).
Scalar Double-Precision FP Compare
CMPEQSD CMPLTSD CMPLESD CMPUNORDSD CMPNEQSD CMPNLTSD CMPNLESD CMPORDSD
CMPSD xmm1,xmm2/mem64,imm8 ; F2 0F C2 /r ib [WILLAMETTE,SSE2]
CMPEQSD xmm1,xmm2/mem64 ; F2 0F C2 /r 00 [WILLAMETTE,SSE2]
CMPLTSD xmm1,xmm2/mem64 ; F2 0F C2 /r 01 [WILLAMETTE,SSE2]
CMPLESD xmm1,xmm2/mem64 ; F2 0F C2 /r 02 [WILLAMETTE,SSE2]
CMPUNORDSD xmm1,xmm2/mem64 ; F2 0F C2 /r 03 [WILLAMETTE,SSE2]
CMPNEQSD xmm1,xmm2/mem64 ; F2 0F C2 /r 04 [WILLAMETTE,SSE2]
CMPNLTSD xmm1,xmm2/mem64 ; F2 0F C2 /r 05 [WILLAMETTE,SSE2]
CMPNLESD xmm1,xmm2/mem64 ; F2 0F C2 /r 06 [WILLAMETTE,SSE2]
CMPORDSD xmm1,xmm2/mem64 ; F2 0F C2 /r 07 [WILLAMETTE,SSE2]
Compares the low double-precision floating-point values in the 'src' operand and the 'dest' operand and returns the results of the comparison to the 'dest' operand. The 'comparison predicate' operand (third operand) specifies the type of comparison performed. The comparison result is a quadword mask of all 1s (comparison true) or all 0s (comparison false). The 'comparison predicate' operand is an 8-bit immediate the first 3 bits of which define the type of comparison to be made bits 4 through 7 of the immediate are reserved.
The destination is an XMM register. The source can be either an XMM register or a 128-bit memory location.
The third operand is an 8-bit immediate value, of which the low 3 bits define the type of comparison. For ease of programming, the 8 two-operand pseudo-instructions are provided, with the third operand already filled in.
The Condition Predicates are:
EQ 0 Equal
LT 1 Less-than
LE 2 Less-than-or-equal
UNORD 3 Unordered
NE 4 Not-equal
NLT 5 Not-less-than
NLE 6 Not-less-than-or-equal
ORD 7 Ordered
For more details of the comparison predicates, and details of how to emulate the 'greater-than' equivalents, see SSE-cc
EXAMPLE:
cmpsd xmm1 xmm2 5
CMPccPS
Usage: CMPccPS dest,src,cmppred Modifies flags: None
Compares the two packed single-precision FP values in the 'src' and 'dest', and returns the result in the 'dest' register. The result of each comparison is a doubleword mask of all 1s (true) or all 0s (false).
Packed Single-Precision FP Compare
CMPEQPS CMPLTPS CMPLEPS CMPUNORDPS CMPNEQPS CMPNLTPS CMPNLEPS CMPORDPS
CMPPS xmm1,xmm2/mem128,imm8 ; 0F C2 /r ib [KATMAI,SSE]
CMPEQPS xmm1,xmm2/mem128 ; 0F C2 /r 00 [KATMAI,SSE]
CMPLTPS xmm1,xmm2/mem128 ; 0F C2 /r 01 [KATMAI,SSE]
CMPLEPS xmm1,xmm2/mem128 ; 0F C2 /r 02 [KATMAI,SSE]
CMPUNORDPS xmm1,xmm2/mem128 ; 0F C2 /r 03 [KATMAI,SSE]
CMPNEQPS xmm1,xmm2/mem128 ; 0F C2 /r 04 [KATMAI,SSE]
CMPNLTPS xmm1,xmm2/mem128 ; 0F C2 /r 05 [KATMAI,SSE]
CMPNLEPS xmm1,xmm2/mem128 ; 0F C2 /r 06 [KATMAI,SSE]
CMPORDPS xmm1,xmm2/mem128 ; 0F C2 /r 07 [KATMAI,SSE]
Performs an SIMD compare of the four packed single-precision floating-point values in the 'src' operand and the 'dest' operand and returns the results of the comparison to the 'dest' operand. The 'comparison predicate' operand (third operand) specifies the type of comparison performed on each of the pairs of packed values. The result of each comparison is a doubleword mask of all 1s (comparison true) or all 0s (comparison false). The 'comparison predicate' operand is an 8-bit immediate the first 3 bits of which define the type of comparison to be made bits 4 through 7 of the immediate are reserved.
The destination is an XMM register. The source can be either an XMM register or a 128-bit memory location.
The third operand is an 8-bit immediate value, of which the low 3 bits define the type of comparison. For ease of programming, the 8 two-operand pseudo-instructions are provided, with the third operand already filled in.
The Condition Predicates are:
EQ 0 Equal
LT 1 Less-than
LE 2 Less-than-or-equal
UNORD 3 Unordered
NE 4 Not-equal
NLT 5 Not-less-than
NLE 6 Not-less-than-or-equal
ORD 7 Ordered
For more details of the comparison predicates, and details of how to emulate the 'greater-than' equivalents, see SSE-cc
EXAMPLE:
cmpps xmm1 xmm2 7
CMPccPD
Usage: CMPccPD dest,src,cmppred Modifies flags: None
Compares the two packed double-precision FP values in the 'src' and 'dest', and returns the result in the 'dest' register. The result of each comparison is a quadword mask of all 1s (true) or all 0s (false).
Packed Double-Precision FP Compare
CMPEQPD CMPLTPD CMPLEPD CMPUNORDPD CMPNEQPD CMPNLTPD CMPNLEPD CMPORDPD
CMPPD xmm1,xmm2/mem128,imm8 ; 66 0F C2 /r ib [WILLAMETTE,SSE2]
CMPEQPD xmm1,xmm2/mem128 ; 66 0F C2 /r 00 [WILLAMETTE,SSE2]
CMPLTPD xmm1,xmm2/mem128 ; 66 0F C2 /r 01 [WILLAMETTE,SSE2]
CMPLEPD xmm1,xmm2/mem128 ; 66 0F C2 /r 02 [WILLAMETTE,SSE2]
CMPUNORDPD xmm1,xmm2/mem128 ; 66 0F C2 /r 03 [WILLAMETTE,SSE2]
CMPNEQPD xmm1,xmm2/mem128 ; 66 0F C2 /r 04 [WILLAMETTE,SSE2]
CMPNLTPD xmm1,xmm2/mem128 ; 66 0F C2 /r 05 [WILLAMETTE,SSE2]
CMPNLEPD xmm1,xmm2/mem128 ; 66 0F C2 /r 06 [WILLAMETTE,SSE2]
CMPORDPD xmm1,xmm2/mem128 ; 66 0F C2 /r 07 [WILLAMETTE,SSE2]
Performs an SIMD compare of the two packed double-precision floating-point values in the 'src' and the 'dest' and returns the results of the comparison to the 'dest'. The 'comparison predicate' operand (third operand) specifies the type of comparison performed on each of the pairs of packed values. The result of each comparison is a quadword mask of all 1s (comparison true) or all 0s (comparison false). The 'comparison predicate' operand is an 8-bit immediate the first 3 bits of which define the type of comparison to be made; bits 4 through 7 of the immediate are reserved.
The destination is an XMM register. The source can be either an XMM register or a 128-bit memory location.
The third operand is an 8-bit immediate value, of which the low 3 bits define the type of comparison. For ease of programming, the 8 two-operand pseudo-instructions are provided, with the third operand already filled in.
The Condition Predicates are:
EQ 0 Equal
LT 1 Less-than
LE 2 Less-than-or-equal
UNORD 3 Unordered
NE 4 Not-equal
NLT 5 Not-less-than
NLE 6 Not-less-than-or-equal
ORD 7 Ordered
For more details of the comparison predicates, and details of how
to emulate the 'greater-than' equivalents, see SSE-cc
EXAMPLE:
cmppd xmm1 xmm2 4
CMP
Usage: CMP dest,src Modifies flags: AF CF OF PF SF ZF
Subtracts 'src' from 'dest' and updates flags but does not save result. Flags can then be checked for conditions.
Compare Integers
CMP r/m8,reg8 ; 38 /r [8086]
CMP r/m16,reg16 ; o16 39 /r [8086]
CMP r/m32,reg32 ; o32 39 /r [386]
CMP reg8,r/m8 ; 3A /r [8086]
CMP reg16,r/m16 ; o16 3B /r [8086]
CMP reg32,r/m32 ; o32 3B /r [386]
CMP r/m8,imm8 ; 80 /0 ib [8086]
CMP r/m16,imm16 ; o16 81 /0 iw [8086]
CMP r/m32,imm32 ; o32 81 /0 id [386]
CMP r/m16,imm8 ; o16 83 /0 ib [8086]
CMP r/m32,imm8 ; o32 83 /0 ib [386]
CMP AL,imm8 ; 3C ib [8086]
CMP AX,imm16 ; o16 3D iw [8086]
CMP EAX,imm32 ; o32 3D id [386]
CMP performs a 'mental' subtraction of its second operand from its first operand, and affects the flags as if the subtraction had taken place, but does not store the result of the subtraction anywhere.
The destination operand can be a register or a memory location. The source can be a register, memory location or an immediate value of the same size as the destination.
EXAMPLE:
If B$WriteCheckerWanted = &TRUE
cmp eax 32 | je L1>
cmp eax CR | je L1>
cmp eax ',' | je L1>
cmp eax 8 | je L1>
cmp eax Tab | jne L0>
L1: call Label