LES
Usage: LES dest,src Modifies flags: None
Loads 32-bit pointer from memory 'src' to 'dest' register and ES. The offset is placed in the 'dest' register and the segment is placed in ES. To use this instruction the word at the lower memory address must contain the offset and the word at the higher address must contain the segment.
Load Far Pointer
LDS reg16,mem ; o16 C5 /r [8086]
LDS reg32,mem ; o32 C5 /r [386]
LES reg16,mem ; o16 C4 /r [8086]
LES reg32,mem ; o32 C4 /r [386]
LFS reg16,mem ; o16 0F B4 /r [386]
LFS reg32,mem ; o32 0F B4 /r [386]
LGS reg16,mem ; o16 0F B5 /r [386]
LGS reg32,mem ; o32 0F B5 /r [386]
LSS reg16,mem ; o16 0F B2 /r [386]
LSS reg32,mem ; o32 0F B2 /r [386]
These instructions load an entire far pointer (16 or 32 bits of offset, plus 16 bits of segment) out of memory in one go. LDS, for example, loads 16 or 32 bits from the given memory address into the given register (depending on the size of the register), then loads the 16 bits from memory into DS. LES, LFS, LGS and LSS work in the same way but use the other segment registers.
Example:
les eax Label
LEAVE
Usage: LEAVE Modifies flags: None
Releases the local variables created by the previous ENTER instruction by restoring ESP and EBP to their condition before the procedure stack frame was initialized.
Destroy Stack Frame
LEAVE ; C9 [186]
LEAVE destroys a stack frame of the form created by the ENTER instruction. It is functionally equivalent to
> MOV ESP,EBP ; followed by
> POP EBP
The old frame pointer (the frame pointer for the calling procedure that was saved by the ENTER instruction) is then popped from the stack into the EBP register, restoring the calling procedure's stack frame. A RET instruction is commonly executed following a LEAVE instruction to return program control to the calling procedure.
Example:
leave
ret
LEA
Usage: LEA dest,src Modifies flags: None
Transfers offset address of 'src' to the 'dest' register.
Load Effective Address
LEA reg16,mem ; o16 8D /r [8086]
LEA reg32,mem ; o32 8D /r [386]
LEA, despite its syntax, does not access memory. It calculates the effective address specified by its second operand as if it were going to load or store data from it, but instead it stores the calculated address into the register specified by its first operand. This can be used to perform quite complex calculations (e.g. LEA EAX D$EBX + ECX*4 + 100) in one instruction.
Its orginal first purpose is with loading complex addresses, depending on combinations of Pointers and Indexes.
LEA, despite being a purely arithmetic behaviour, which accesses no memory, still requires a formulation in the manner of a Memory reference.
You may consider LEA as the equivalent non existing MOV Instruction that would do something like this:
MOV eax, ebx+ecx*4+100 ; Does not exist in x86 Instructions set.
All of this is nothing but a reuse of the standard Effective Addressing mode of the x86, that you usually see in all Memory accesses, example:
ADD edx D§ebx+ecx*4+100 eax edx
More about this at the end of Addressing [SIB Adressing (Effective adress).]
Example:
lea eax edx
LDS
Usage: LDS dest,src Modifies flags: None
Loads 32-bit pointer from memory 'src' to 'dest' register and DS. The offset is placed in the 'dest' register and the segment is placed in DS. To use this instruction the word at the lower memory address must contain the offset and the word at the higher address must contain the segment.
Load Far Pointer
LDS reg16,mem ; o16 C5 /r [8086]
LDS reg32,mem ; o32 C5 /r [386]
LES reg16,mem ; o16 C4 /r [8086]
LES reg32,mem ; o32 C4 /r [386]
LFS reg16,mem ; o16 0F B4 /r [386]
LFS reg32,mem ; o32 0F B4 /r [386]
LGS reg16,mem ; o16 0F B5 /r [386]
LGS reg32,mem ; o32 0F B5 /r [386]
LSS reg16,mem ; o16 0F B2 /r [386]
LSS reg32,mem ; o32 0F B2 /r [386]
These instructions load an entire far pointer (16 or 32 bits of offset, plus 16 bits of segment) out of memory in one go. LDS, for example, loads 16 or 32 bits from the given memory address into the given register (depending on the size of the register), then loads the 16 bits from memory into DS. LES, LFS, LGS and LSS work in the same way but use the other segment registers.
Example:
lds eax Label
LDMXCSR
Usage: LDMXCSR src Modifies flags: None
Loads the 'src' operand into the MXCSR control/status register. The 'src' operand is a 32- bit memory location.
Load Streaming SIMD Extension Control/Status
LDMXCSR mem32 ; 0F AE /2 [KATMAI,SSE]
LDMXCSR loads 32-bits of data from the specified memory location into the MXCSR control/status register. MXCSR is used to enable masked/unmasked exception handling, to set rounding modes, to set flush-to-zero mode, and to view exception status flags.
For details of the MXCSR register, see the Intel processor docs.
See also STMXCSR.
EXAMPLE:
ldmxcsr label
LDDQU
Usage: LDDQU dest,src Modifies flags: None
Load data from memory and return 128 bits in an xmm register.
Load Unaligned Integer 128 Bits
LDDQU xmm1,mem ; F2 0F F0 /r [Pent4]
The instruction is functionally similar to MOVDQU xmm, m128 for loading from memory. That is: 16 bytes of data starting at an address specified by the 'src' memory (second operand) are fetched from memory and placed in a 'dest' register (first operand). The 'src' operand need not be aligned on a 16-byte boundary. Up to 32 bytes may be loaded from memory; this is implementation dependent. This instruction may improve performance relative to MOVDQU if the source operand crosses a cache line boundary.
In situations that require the data loaded by LDDQU be modified and stored to the same location, use MOVDQU or MOVDQA instead of LDDQU. To move a double quadword to or from memory locations that are known to be aligned on 16-byte boundaries, use the MOVDQA instruction.
EXAMPLE:
lddqu xmm2 Label
LAR
Usage: LAR dest,src Modifies flags: ZF
The high byte of the of the 'dest' register is overwritten by the value of the access rights byte and the low order byte is zeroed depending on the selection in the 'src' operand. The ZF flag is set if the load operation is successful.
Load Access Rights
LAR reg16,r/m16 ; o16 0F 02 /r [286,PRIV]
LAR reg32,r/m32 ; o32 0F 02 /r [286,PRIV]
LAR takes the segment selector specified by its source (second) operand, finds the corresponding segment descriptor in the GDT or LDT, and loads the access-rights byte of the descriptor into its destination (first) operand.
Example:
lar eax Label
LAHF
Usage: LAHF Modifies flags: None
Copies bits 0-7 of the flags register into AH. This includes flags AF, CF, PF, SF and ZF other bits are undefined.
Load AH from Flags
LAHF ; 9F [8086]
LAHF sets the AH register according to the contents of the low byte of the flags word.
The operation of LAHF is:
AH <-- SF:ZF:0:AF:0:PF:1:CF
See also SAHF.
Example:
lahf
JMP
Usage: JMP label Modifies flags: None
Unconditionally transfers control to 'label'. Jumps by default are within -32768 to 32767 bytes from the instruction following the jump. NEAR and SHORT jumps cause the IP to be updated while FAR jumps cause CS and IP to be updated.
Jump
JMP imm ; E9 rw/rd [8086]
JMP SHORT imm ; EB rb [8086]
JMP imm:imm16 ; o16 EA iw iw [8086]
JMP imm:imm32 ; o32 EA id iw [386]
JMP FAR mem ; o16 FF /5 [8086]
JMP FAR mem32 ; o32 FF /5 [386]
JMP r/m16 ; o16 FF /4 [8086]
JMP r/m32 ; o32 FF /4 [386]
JMP jumps to a given address. The address may be specified as an absolute segment and offset, or as a relative jump within the current segment.
JMP SHORT imm has a maximum range of 128 bytes, since the displacement is specified as only 8 bits, but takes up less code space. RosAsm does not choose when to generate JMP SHORT for you: you must explicitly code a SHORT jump by making use for Local Meaningless labels.
The JMP FAR mem forms execute a far jump by loading the destination address out of memory. The address loaded consists of 16 or 32 bits of offset (depending on the operand size), and 16 bits of segment. The operand size may be overridden using JMP WORD FAR mem or JMP DWORD FAR mem.
The JMP r/m forms execute a jump (within the same segment), loading the destination address out of memory or out of a register. The keyword NEAR may be specified, for clarity, in these forms, but is not necessary. Again, operand size can be overridden using JMP WORD mem or JMP DWORD mem.
EXAMPLE:
xor eax eax
L1: add eax 5
cmp 40 | jz label2
jmp L1
Label2:
JECXZ
Usage: JECXZ label Modifies flags: None
Causes execution to branch to 'label' if register ECX is zero. Uses unsigned comparision.
Jump if CX/ECX Zero
JCXZ imm ; a16 E3 rb [8086]
JECXZ imm ; a32 E3 rb [386]
JCXZ performs a short jump (with maximum range 128 bytes) if and only if the contents
of the CX register is 0.
JECXZ does the same thing, but with ECX.
Example:
jecxz Label